Misaligned Via Fuse Structure for Compact Semiconductor Integration
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Solution Overview
Problem
Fuses in semiconductor devices require significant space, are time-consuming to test, and can cause operational issues due to the spread of conductive material, and resistors face challenges in controlling resistance, especially at high and low values.
Innovation Solution
A fuse structure is created by misaligning a via to a conductive layer, increasing resistance and heat at the point of misalignment, allowing for selective blowing using controlled current, and the same structure can be used as a resistor by varying the alignment and configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional fuses are used in semiconductor devices, then fuse functionality is provided, but significant space is required and testing is time-consuming
Solution Approach 1:
The patent merges the fuse structure with standard interconnect layers and vias, making the fuse an integral part of the IC fabrication process rather than a separate component. This integration eliminates dedicated fuse space and allows testing to be performed alongside normal circuit testing, reducing both area and time losses.
Solution Approach 2:
The via structure serves multiple functions: it acts as both a standard interconnect element and a fuse element. The same via that connects conductive layers can be selectively transformed into a fuse by controlling the metallization process, providing multi-functionality that reduces overall device complexity and space requirements.
2Ease of manufacture
If laser blowing is used to blow fuses, then fuse blowing is achieved, but conductive material spreads which may cause operational problems
Solution Approach 1:
The patent replaces the mechanical/laser-based blowing process with an electrical blowing mechanism. Current is applied through the via to heat and vaporize the metallization material, causing it to recede rather than spread. This electrical method provides precise control and eliminates the harmful material spread associated with laser blowing.
Solution Approach 2:
The patent changes the blowing mechanism from external laser energy to electrical current through the via. By controlling the current magnitude and duration, the metallization can be precisely removed from the via bottom without affecting surrounding areas, transforming the blowing process from a harmful spread mechanism to a controlled recession process.
3Ease of operation
If electrical circuits are used to blow fuses onboard the chip, then fuse blowing is achieved, but large current is required which may not be available
Solution Approach 1:
The patent creates a localized high-resistance region at the via bottom by controlling metallization deposition. This localized resistance concentration allows fuse blowing with much lower current than would be required for a uniform conductor, as the heat generation (I²R) is concentrated in a small volume, enabling blowing with available on-chip current levels.
4Reliability
If fuse conductivity is too high relative to surrounding material, then heat is not sufficiently focused to blow the fuse effectively
Solution Approach 1:
The patent performs preliminary control of the via metallization deposition process to create the desired resistance profile before the fuse blowing operation. By controlling the metallization thickness and continuity at the via bottom during fabrication, the resistance is pre-configured to ensure proper heat focusing during subsequent blowing operations, eliminating the need for post-fabrication adjustments.
5Manufacturing precision
If resistors use metal with long lengths to control resistance, then resistance control is achieved, but significant space is required
Solution Approach 1:
The patent transitions from controlling resistance through length (one-dimensional) to controlling resistance through cross-sectional area and material composition (two-dimensional/three-dimensional). By varying the via fill material, barrier layer thickness, or via diameter, precise resistance control is achieved in a compact volume, eliminating the need for long metal traces.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The misaligned via fuse structure enables efficient and controlled blowing with minimal impact on the circuit, providing a compact solution for fuses and resistors, allowing for precise resistance control and reduced space usage.
Implementation Method 1
the heat (I2R) increases linearly with an increase in resistance at any point in the path
Data Source
AI summary
A semiconductor structure comprising a fuse/resistor structure over a functional layer having a substrate. The fuse/resistor structure includes a via, a first interconnect layer, and a second interconnect layer. The via is over the functional layer and has a first end and a second end vertically opposite the first end, wherein the first end is bounded by a first edge and a second edge opposite the first edge and the second end is bounded by a third edge and a fourth edge opposite the third edge. The first interconnect layer includes a first metal layer running horizontally and contacting the first end and completely extending from the first edge to the second edge. The second interconnect layer includes a second metal layer running horizontally and contacting the second end of the via and extending past the third edge but reaching less than half way to the fourth edge.


