Miscut Substrate Trench Epitaxy for Dislocation Reduction
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Solution Overview
Problem
The high number of dislocations in semiconductor film layers due to lattice mismatch, polarity effects, and thermal expansion coefficient differences leads to cracking and degradation of device performance.
Innovation Solution
A semiconductor structure with a miscut angle substrate featuring trenches with acute-angled sidewalls and epitaxial layers grown within these trenches to terminate dislocation extension, utilizing miscut angle substrates like monocrystalline silicon or sapphire with controlled etching to form (111) or (0001) crystal planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If group III-V compound semiconductors are grown on substrates using conventional epitaxial methods, then the semiconductor film layer can be formed, but a high number of dislocations occurs due to lattice mismatch, polarity effects, and thermal expansion coefficient differences
Solution Approach 1:
The substrate surface is segmented into multiple trenches with acute-angled sidewalls. These trenches divide the continuous substrate surface into discrete growth regions, allowing the epitaxial layer to be formed in isolated compartments. This segmentation prevents dislocation propagation across the entire substrate while maintaining controlled growth conditions in each trench, thereby reducing overall dislocation density and improving crystal quality
Solution Approach 2:
The patent applies different geometric configurations to different regions of the substrate. Specifically, trenches with acute-angled sidewalls are created at specific locations where dislocation termination is desired. This local modification of substrate geometry allows selective dislocation management in critical areas while preserving other substrate regions, addressing the dislocation problem without compromising overall device performance
2Reliability
If the thickness of group III-V compound semiconductor film layer is increased to achieve critical value for device performance, then the film can provide sufficient electrical properties, but cracking is prone to occur due to thermal expansion coefficient difference
Solution Approach 1:
By segmenting the film growth into isolated trenches, the patent creates independent stress compartments. Each trench acts as a separate unit that can accommodate thermal expansion stresses locally without transmitting cracks to adjacent regions. This allows the film to achieve sufficient thickness for device performance while maintaining structural integrity through the stress-isolating trench structure
Solution Approach 2:
The acute-angled sidewalls of the trenches create an asymmetric geometry that influences stress distribution within the film layer. This asymmetric structure helps redirect and distribute thermal stresses away from critical interfaces, reducing the likelihood of crack formation as the film thickness increases to achieve necessary electrical properties
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces dislocation density, improving crystal quality and enhancing device performance by terminating dislocations at sidewalls, thus improving luminous efficiency or power characteristics.
Implementation Method 1
a first epitaxial layer, where the first epitaxial layer is located in the plurality of trenches, where each trench of the plurality of trenches includes a bottom wall end, and a first sidewall and a second sidewall located on two sides of the bottom wall end and opposite to each other, and a first included angle formed by the bottom wall end and the first sidewall is an acute angle
Implementation Method 2
Epitaxial growth of a group III-V compound on a substrate still has many problems to be solved
Data Source
AI summary
A semiconductor structure includes: a miscut angle substrate, where the miscut angle substrate includes an upper surface and a lower surface opposite to each other, and a plurality of trenches are formed from the upper surface; and a first epitaxial layer, where the first epitaxial layer is located in the plurality of trenches, where each trench of the plurality of trenches includes a bottom wall end, and a first sidewall and a second sidewall located on two sides of the bottom wall end and opposite to each other, and a first included angle formed by the bottom wall end and the first sidewall is an acute angle. The technical solutions of the present disclosure may reduce a dislocation density of the semiconductor structure.