Five-Mask MISFET Fabrication Reducing Photolithography Steps
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Solution Overview
Problem
The existing processes for manufacturing high-voltage metal-insulator-semiconductor field effect transistors (MISFETs) require a large number of masks, leading to increased manufacturing costs and reduced yield.
Innovation Solution
A method is introduced that reduces the number of masks needed from six to five by using a specific sequence of mask steps and oxide layer manipulations to form the active and termination regions of the MISFET, including the formation of field rings, which allows for the reduction of manufacturing costs and increased yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If six masks are used to manufacture high-voltage MISFETs (three for active region and three for termination rings), then the device can achieve high-voltage performance, but manufacturing costs increase and yield decreases
Solution Approach 1:
The patent combines the formation of termination rings with the active region processing by using the same first mask and first oxide layer removal steps for both regions. The second mask and second oxide layer removal selectively process only the termination region for field ring formation, merging two previously separate mask sequences into a unified five-step process that reduces cost while maintaining high-voltage performance
Solution Approach 2:
The patent segments the mask processing into two functional groups: masks 1-3 that handle both active region and termination region formation, and mask 4 that specifically handles field ring formation in the termination region. This segmentation allows optimization of the common processing steps while maintaining specialized processing where needed, reducing the total mask count from six to five
2Manufacturing precision
If three masks are used for active region and three additional masks for termination rings, then proper field ring formation is achieved, but the number of photolithographic steps increases
Solution Approach 1:
The patent performs preliminary formation of the first oxide layer across both active and termination regions, then uses the first mask to define both regions simultaneously. The field oxide is removed in advance for both regions, and dopant implantation is prepared beforehand. This preliminary action allows the subsequent second mask to focus solely on field ring formation, reducing the total number of masking steps while maintaining precision
Solution Approach 2:
The first mask and first oxide layer removal serve multiple functions: they define both the active region boundaries and the termination region boundaries, and prepare both regions for subsequent dopant implantation. This multi-functionality eliminates the need for separate masking steps for active region and termination region definition, reducing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The five-mask process effectively forms high-voltage MISFETs with improved manufacturing efficiency and reduced costs, enhancing the overall yield of the semiconductor fabrication process.
Implementation Method 1
parts of the second oxide layer and the first oxide layer in the second region that are exposed through gaps in the mask are removed, thereby exposing the epitaxial layer
Implementation Method 2
Second-type dopant is implanted through the resultant openings in the first and second oxide layers into the epitaxial layer in the second region, thereby forming field rings for the MISFET
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
During fabrication, a second oxide layer is disposed over a first region and a second region of a structure. The second region includes a first oxide layer between the second oxide layer and an epitaxial layer. The first region corresponds to an active region of a metal-insulator-semiconductor field effect transistor (MISFET), and a first-type dopant source region, a second-type dopant body region, and a second-type dopant implant region are formed in the first region. The second region corresponds to a termination region of the MISFET. A mask is formed over the second region, and parts of the second oxide layer and the first oxide layer that are exposed through the gaps are removed, thereby exposing the epitaxial layer. Second-type dopant is deposited into the epitaxial layer through the resultant openings in the first and second oxide layers, thereby forming field rings for the MISFET.