MISFET Gate Interface Metal Density for Leakage Control
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Solution Overview
Problem
The challenge in semiconductor devices is to reduce leakage current and control threshold voltage in CMISFETs, particularly with the scaling of gate insulating films, where high-k films like HfO2 introduce shifts in flat band voltage and reduce mobility, making it difficult to achieve low power consumption and high-speed operation.
Innovation Solution
A semiconductor device with a CMISFET structure featuring a gate insulating film of silicon oxide or silicon oxynitride and a silicon gate electrode, where metal elements like hafnium are introduced near the interface with a surface density of 1×10^13 to 5×10^14 atoms/cm^2 to adjust the threshold voltage without increasing impurity concentration, thereby reducing leakage current and enhancing mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If high-k films like HfO2 are used as gate insulating films to reduce leakage current, then leakage current is suppressed, but flat band voltage shifts and mobility deteriorates
Solution Approach 1:
The patent applies local quality by forming a nitrogen-rich region specifically at the interface between the gate insulating film and semiconductor substrate, while keeping other regions of the gate insulating film with different nitrogen concentrations. This localized modification addresses the flat band voltage shift and mobility deterioration only where they occur most severely, without compromising the overall leakage current suppression benefits of the high-k film.
Solution Approach 2:
The patent changes the nitrogen concentration parameter within the gate insulating film to optimize performance. By controlling nitrogen concentration to be highest at the interface (first nitrogen concentration) and lower in upper regions (second nitrogen concentration), the patent adjusts electrical properties to suppress flat band voltage shifts and maintain mobility while preserving leakage current reduction.
2Productivity
If gate insulating film thickness is reduced to achieve scaling, then device performance improves, but leakage current increases
Solution Approach 1:
The patent uses composite materials by combining a high-k gate insulating film (such as HfO2, HfSiO3, or HfSiON) with controlled nitrogen distribution. This composite structure maintains thin film thickness for scaling while the high-k property and nitrogen modification work together to suppress leakage current, resolving the contradiction between thinning for performance and preventing leakage.
3Manufacturing precision
If metal elements are introduced to adjust threshold voltage, then threshold voltage control improves, but impurity concentration increases which may harm device performance
Solution Approach 1:
The patent uses nitrogen as an intermediary element to adjust threshold voltage and flat band voltage instead of directly introducing metal impurities. The nitrogen atoms modify the electrical properties of the gate insulating film interface, achieving threshold voltage control without the harmful effects of increased metal impurity concentration in the semiconductor substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses leakage current and adjusts threshold voltage, improving the performance of semiconductor devices by maintaining low power consumption and high-speed operation, while minimizing electron and hole mobility deterioration.
Implementation Method 1
metal elements are introduced near an interface between the gate electrode and the gate insulating film with a surface density of 1×10^13 to 5×10^14 atoms/cm^2 to adjust the threshold voltage
Implementation Method 2
a gate insulating film composed of a silicon oxide film or a silicon oxynitride film
Data Source
AI summary
Disclosed is a semiconductor device including a first MISFET of an n channel type and a second MISFET of a p channel type, each of the MISFETs being configured with a gate insulating film featuring a silicon oxide film or a silicon oxynitride film and a gate electrode including a conductive silicon film positioned on the gate insulating film. Metal elements such as Hf are introduced near the interface between the gate electrode and the gate insulating film in both the first and second MISFETs such that metal atoms with a surface density of 1×1013 to 5×1014 atoms/cm2 are contained near the interface and each of the first and second MISFETs having a channel region containing an impurity the concentration of which is equal to or lower than 1.2×1018/cm3.