Mixed 3D Memory Arrays for Cost and Speed Optimization
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Solution Overview
Problem
Three-dimensional memory (3D-M) devices face challenges in efficiently storing both data and codes due to uniform memory array sizes, which lead to either high costs or slow access speeds, failing to meet the distinct requirements of data and code storage.
Innovation Solution
A mixed 3D-M architecture is introduced, featuring memory arrays or blocks of different sizes, where large arrays for data storage and small arrays for code storage are integrated within the same die, optimizing array efficiency and memory speed by segregating data and code storage based on cost and access speed requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If uniform memory array sizes are used in all memory blocks, then manufacturing simplicity is maintained, but storage cost and access speed requirements cannot be simultaneously optimized for different data types
Solution Approach 1:
The memory die is segmented into multiple memory blocks, where each block can contain memory arrays of different sizes. This segmentation allows data requiring low cost to be stored in larger arrays while codes requiring fast access are stored in smaller arrays, optimizing both cost and performance without requiring a completely different memory architecture
Solution Approach 2:
Different regions of the memory die are assigned different array sizes based on local requirements. Specifically, certain memory blocks contain larger memory arrays optimized for data storage with lower cost per bit, while other blocks contain smaller memory arrays optimized for code storage with faster access speed. This local differentiation resolves the contradiction between cost optimization and access speed without increasing overall device complexity
2Quantity of substance
If large memory arrays are used, then storage capacity and cost efficiency improve, but access speed decreases
Solution Approach 1:
The memory system is divided into multiple segments or blocks, each with different array sizes. Large memory arrays are allocated for data storage where high capacity and low cost are priorities, while small memory arrays are allocated for code storage where fast access is critical. This segmentation allows both large and small arrays to coexist, enabling the system to achieve both high storage capacity and fast access speed simultaneously for different types of information
Solution Approach 2:
Different regions of the memory die are optimized for different performance characteristics. Areas with large memory arrays provide high storage capacity and low cost per bit for data, while areas with small memory arrays provide fast access speed for codes. This local quality differentiation resolves the contradiction by allowing each region to be optimized for its specific function rather than requiring uniform performance across the entire memory die
3Speed
If small memory arrays are used, then access speed improves, but storage cost increases
Solution Approach 1:
The memory die is segmented into multiple blocks with different array sizes, allowing small memory arrays to be used only where fast access is required (for codes), while large memory arrays are used for data storage where cost efficiency is more important. This segmentation prevents the need to use small arrays throughout the entire memory die, thereby avoiding the increased cost that would result from universal use of small arrays
Solution Approach 2:
Small memory arrays with fast access speed are deployed locally in specific memory blocks where code storage is required, while large memory arrays with lower cost per bit are used in other blocks for data storage. This local quality approach ensures that fast access speed is achieved only where necessary, avoiding the unnecessary cost increase that would occur if small arrays were used throughout the entire memory system
Data Source
AI summary
The present invention discloses a mixed three-dimensional memory (3D-Mx). It comprises memory arrays (or, memory blocks) of different sizes. In a 3D-Mx with mixed memory blocks, the memory blocks with different sizes are formed side-by-side. In a 3D-Mx with mixed memory arrays, a plurality of small memory arrays are formed side-by-side underneath a single large memory array.