Mixed Cell Library Circuit Design Using Buffer Zone Routing
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Solution Overview
Problem
Modern EDA implementation tools, such as the IC Compiler, do not provide a straightforward way to implement circuit designs using mixed cell libraries, forcing designers to assign different cell libraries to different hierarchical layers, which disrupts the hierarchical design theory and limits flexibility in assigning priorities to different portions of a circuit.
Innovation Solution
A system and method that allows designers to use mixed cell libraries by identifying cell library identities within the netlist, enabling the creation of partitions and physical clusters within a hierarchical layer, and routing interconnects in buffer zones between clusters, without the need for additional hierarchical layers or complex technology files.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different cell libraries are assigned to different hierarchical layers, then circuit design flexibility is improved, but device complexity and design process complexity increase
Solution Approach 1:
The patent segments the circuit design into distinct clusters, each associated with a specific cell library identity. This segmentation allows different cell libraries to be used within the same hierarchical layer without requiring additional hierarchical layers, thereby maintaining design flexibility while avoiding increased complexity. The segmentation is achieved by identifying cell library identities in the netlist and creating partitions based on these identities.
Solution Approach 2:
The patent introduces a new dimension of organization by associating cell library identities with spatial clusters rather than hierarchical layers. This dimensional shift allows designers to freely assign different cell libraries to different portions of the circuit without being constrained by hierarchical layer structures, thus improving flexibility while avoiding the complexity of multi-layer hierarchical management.
2Productivity
If mixed cell libraries are used without additional hierarchical layers, then design efficiency is improved, but routing complexity increases
Solution Approach 1:
The patent introduces buffer zones as intermediary regions between clusters of different cell library identities. These buffer zones serve as transition areas that facilitate interconnect routing between different cell library clusters, thereby managing routing complexity while maintaining the efficiency benefits of using mixed cell libraries within the same hierarchical layer.
Solution Approach 2:
The patent applies local quality by creating buffer zones specifically at the boundaries between clusters of different cell library identities. This localized approach to routing management addresses routing complexity only where needed (at cluster boundaries) rather than throughout the entire design, thereby maintaining overall design efficiency while managing local routing challenges.
3Adaptability or versatility
If cell library identities are identified within the netlist, then adaptability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary identification of cell library identities within the netlist before the actual placement process. This preliminary action allows the design tool to pre-organize cells into clusters based on their library identities, thereby reducing the precision requirements during the actual placement and manufacturing stages. The pre-organization simplifies the manufacturing process while maintaining adaptability.
Data Source
AI summary
A system and method for designing circuits, such as integrated circuits, that allow a designer to employ mixed cell libraries. In one embodiment, the system includes: (1) a cell placement EDA tool configured to transform a logical circuit representation into a physical circuit representation by placing cells from mixed cell libraries into clusters corresponding to the mixed cell libraries and (2) an interconnect routing EDA tool associated with the cell placement EDA tool and configured to route interconnects in buffer zones separating the clusters.