Mixed Conductive Track Structure for IC Miniaturization

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Solution Overview

Problem

Current integrated circuit manufacturing methods, particularly those using aluminum-copper tracks, result in larger dimensions and higher costs compared to copper track methods, limiting the miniaturization of integrated circuits, especially for non-volatile ROMs where metal tracks define the memory size.

Innovation Solution

The use of a specific conductive track structure with tungsten-based tracks in one area and aluminum-based tracks in another, along with varying via lengths and materials, allows for smaller integrated circuit dimensions while reducing manufacturing costs by employing a method that includes forming conductive portions and vias within insulating layers with distinct dimensions and materials.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If aluminum-copper track method is used, then manufacturing cost is reduced, but integrated circuit dimensions increase

Engineering Contradiction:
Improvemanufacturing costVSAvoidintegrated circuit dimensions
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent applies local quality by using different conductive materials (tungsten and aluminum-based) in different areas of the integrated circuit. Specifically, tungsten-based tracks are used in ROM areas where miniaturization is critical, while aluminum-based tracks are used in other areas. This localized material selection allows the circuit to achieve smaller dimensions in key areas without incurring the high manufacturing costs of a complete copper track implementation.

Inventive Principle:
Principle #3Local quality

2Length of stationary object

If copper track method is used, then integrated circuit dimensions decrease, but manufacturing cost increases

Engineering Contradiction:
Improveintegrated circuit dimensionsVSAvoidmanufacturing cost
Core Design Contradiction:
Length of stationary objectVSEase of manufacture

Solution Approach 1:

The patent segments the integrated circuit into different areas with different conductive material requirements. By dividing the circuit into ROM areas (requiring minimal dimensions) and other areas (with less stringent size requirements), the patent applies tungsten-based tracks only where necessary for miniaturization, thereby reducing overall manufacturing costs while achieving the required circuit density.

Inventive Principle:
Principle #1Segmentation

3Length of stationary object

If metal track dimensions are decreased, then integrated circuit size is reduced, but series resistance increases

Engineering Contradiction:
Improveintegrated circuit sizeVSAvoidseries resistance
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent changes the material parameter (conductive material type) to resolve the contradiction between miniaturization and resistance. Tungsten-based tracks are used in areas where dimension reduction is critical, and tungsten's superior conductivity at small dimensions helps maintain acceptable series resistance levels even when track dimensions are minimized.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8426973B2Integrated circuit of decreased size
Publication Date: 2013.04.23 STMICROELECTRONICS (ROUSSET) SAS
  • US8426973B2 patent drawing
  • US8426973B2 patent drawing
  • US8426973B2 patent drawing

AI summary

An integrated circuit including an insulating layer having first and second opposite surfaces. The circuit includes, in a first area, first conductive portions of a first conductive material, located in the insulating layer, flush with the first surface and continued by first vias of the first conductive material, of smaller cross-section and connecting the first conductive portions to the second surface. The circuit further includes, in a second area, second conductive portions of a second material different from the first conductive material and arranged on the first surface and second vias of the first conductive material, in contact with the second conductive portions and extending from the first surface to the second surface.