Polycrystalline Resistor Layout Using Mixed Doping Against Package Stress

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Solution Overview

Problem

Semiconductor die resistors experience resistance variations due to package-induced stress, which affects the performance of analog circuits where precision is critical, as N-type and P-type regions respond oppositely to stress vectors, leading to shifts in temperature coefficients and resistivity.

Innovation Solution

A polycrystalline semiconductor resistor structure with regions of different net conductivity types, where a silicide structure electrically connects N-type and P-type regions, and silicide blocking materials prevent silicide formation on specific portions, allowing the resistor to counterbalance stress-induced changes in resistivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a polycrystalline semiconductor resistor uses a single conductivity type region, then the manufacturing process is simple, but the resistance value varies significantly under package-induced stress

Engineering Contradiction:
Improveresistance stabilityVSAvoidresistor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The polycrystalline semiconductor resistor is segmented into multiple regions with different conductivity types (N-type and P-type). Each region responds oppositely to stress vectors, and their combined effect compensates for stress-induced resistance variations, thereby improving resistance stability under package-induced stress.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The resistor employs a composite structure combining N-type and P-type doped polycrystalline semiconductor regions. This composite material approach leverages the opposite piezoresistive coefficients of N-type and P-type materials to counterbalance stress effects, achieving superior resistance stability compared to single-material resistors.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If silicide is formed on the entire polycrystalline semiconductor surface, then electrical connection is improved, but resistance control precision deteriorates due to unwanted silicide formation in certain regions

Engineering Contradiction:
Improveresistance value controlVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

Silicide formation is applied selectively to specific regions of the polycrystalline semiconductor rather than uniformly across the entire surface. Silicide blocking materials are used in regions where silicide formation would adversely affect resistance characteristics, while allowing silicide formation in regions where it improves electrical connection. This local differentiation enables precise resistance control while maintaining ease of manufacture.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces resistivity variation due to package-induced stress, enhancing circuit performance by stabilizing resistance values across various stress conditions, particularly in analog circuits.

Implementation Method 1

a silicide structure located on both a first portion of the first region and a first portion of the second region to electrically connect the first portion of the first region and the first portion of the second region

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

N-type and P-type regions respond oppositely to stress vectors, leading to shifts in temperature coefficients and resistivity

Methodology Applied
Scientific EffectPiezoresistive effect: Piezoresistive Effect

Data Source

PatentEP4291007A1Polycrystalline semiconductor resistor
Publication Date: 2023.12.13 NXP USA INC
  • EP4291007A1 patent drawingFigure 1
  • EP4291007A1 patent drawingFigure 2
  • EP4291007A1 patent drawingFigure 3

AI summary

In one embodiment, a semiconductor die includes a polycrystalline semiconductor resistor structure (poly resistor structure). The poly resistor structure includes a resistive path between a first terminal and a second terminal. The poly resistor structure includes a first region having a net first conductivity type dopant concentration located in the resistance path and a second region having a net second conductivity type dopant concentration located in the resistance path. A silicide structure is located on both a first portion of the first region and a first portion of the second region to electrically connect the first portion of the first region and the first portion of the second region. In some embodiments, poly resistor structures with different conductivity type regions can be connected together.