Mixed-Filter PLL Circuit for PVT-Stable Frequency Control

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Solution Overview

Problem

As semiconductor integration advances, all-digital phase locked loop (PLL) circuits face challenges in precise control due to sensitivity to process, voltage, and temperature (PVT) variations, making it difficult to maintain stable frequency and phase synchronization in small semiconductor chips.

Innovation Solution

A phase locked loop circuit is designed with a bang-bang phase frequency detector, an analog-digital mixed filter, a voltage controlled oscillator, and a divider, incorporating a digital filter, delta-sigma modulator, and an analog integrator with a charge pump array to generate control signals that stabilize the output frequency and phase, reducing noise and PVT sensitivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If an all-digital phase locked loop circuit is used to reduce area, then the semiconductor chip size is reduced, but the circuit becomes sensitive to PVT variations making precise control difficult

Engineering Contradiction:
Improvesemiconductor chip areaVSAvoidcontrol precision under PVT variations
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by using different circuit implementations for different functional blocks within the PLL. Specifically, the voltage controlled oscillator uses an analog implementation with switched capacitor circuits that are less sensitive to PVT variations, while other blocks can remain digital. This localized analog implementation in the VCO section provides better frequency control stability without requiring the entire circuit to be analog, thus maintaining area efficiency while improving reliability.

Inventive Principle:
Principle #3Local quality

2Area of moving object

If a digital controlled oscillator is used in an all-digital PLL, then the circuit area is reduced, but the oscillator becomes sensitive to PVT variations

Engineering Contradiction:
Improveoscillator circuit areaVSAvoidfrequency control precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent substitutes a traditional digital controlled oscillator with an analog voltage controlled oscillator that uses switched capacitor technology. This replacement leverages analog circuit principles to achieve better frequency control precision. The VCO uses continuous voltage control rather than discrete digital steps, providing finer resolution and better linearity in frequency control, thereby improving manufacturing precision while maintaining a compact implementation suitable for integrated circuits.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a PLL circuit with improved performance and reduced costs by stabilizing the output frequency and phase, enhancing precision and reliability in semiconductor chips despite PVT variations.

Implementation Method 1

a charge pump array including a plurality of charge pumps and configured to output the control signal based on the pull-up and pull-down signals

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

an analog integrator configured to output the control signal based on the first and second signals

Methodology Applied
Scientific EffectIntegration:

Implementation Method 3

a voltage controlled oscillator configured to output an output signal based on the control signal

Methodology Applied
Scientific EffectVoltage control of oscillation frequency:

Implementation Method 4

a divider configured to divide the output signal by n and output the divided signal as the feedback signal

Methodology Applied
Scientific EffectFrequency division:

Data Source

PatentUS9214946B2Phase locked loop circuit
Publication Date: 2015.12.15 SAMSUNG ELECTRONICS CO LTD
  • US9214946B2 patent drawing
  • US9214946B2 patent drawing
  • US9214946B2 patent drawing

AI summary

A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal.