Mixed-Height Cell Regions for Dense Standard-Cell Integration

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Solution Overview

Problem

Existing semiconductor design technologies face challenges in efficiently integrating custom cells with standard cells in semiconductor devices, particularly in terms of layout optimization and fin patterns arrangement.

Innovation Solution

The proposed solution involves a double height cell region design with specific arrangements of active and dummy fins, along with gate patterns, to optimize the layout and facilitate integration with standard cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If custom cells are designed with project-specific arrangements to provide higher-level logic functions, then the logic function capability is improved, but the footprint area increases significantly compared to standard cells

Engineering Contradiction:
Improvelogic function capabilityVSAvoidcell footprint
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The custom cell is segmented into multiple standard cell columns arranged in a grid-like structure. Each column contains standard cells that can be independently configured, allowing the custom cell to achieve project-specific logic functions through selective activation and arrangement of these modular columns, thereby reducing the overall footprint while maintaining functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention creates a universal custom cell structure that can accommodate multiple standard cell types and configurations within a standardized footprint. By designing the custom cell with a grid of columns that can be selectively populated with different standard cells, the structure achieves multi-functionality and adaptability to various logic requirements without requiring a larger area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If standard cells are designed with a fixed height dimension to facilitate placement, then the ease of placement is improved, but the layout density is reduced when integrating with custom cells of different dimensions

Engineering Contradiction:
Improveplacement easeVSAvoidlayout density
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The invention applies local quality by allowing different regions (columns) within the custom cell to have different heights and configurations tailored to specific logic requirements, while the overall custom cell structure maintains a standardized external footprint. This enables efficient integration with standard cells at the interface level while preserving internal optimization for specific functions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention resolves the dimensionality conflict by organizing the custom cell into multiple vertical columns of standard cells, effectively utilizing the vertical dimension. This columnar arrangement allows the custom cell to achieve the required logic functions through vertical stacking of standard cells with fixed heights, while the horizontal footprint remains standardized for efficient placement and integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If custom cells have different dimensions from standard cells, then the logic function specificity is improved, but the integration efficiency with standard cells deteriorates

Engineering Contradiction:
Improvelogic function specificityVSAvoidintegration efficiency
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The invention implements the nested doll principle by embedding multiple standard cells within the custom cell structure. The custom cell is constructed as a container that houses an array of standard cells in a columnar arrangement, allowing the standard cells to be nested within the custom cell's standardized footprint. This nesting approach enables efficient integration and manufacturing while maintaining the specific logic functions required by the project.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12243914B2Different height cell subregions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same
Publication Date: 2025.03.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12243914B2 patent drawing
  • US12243914B2 patent drawing
  • US12243914B2 patent drawing

AI summary

A method (of generating a layout diagram, the layout diagram being stored on a non-transitory computer-readable medium) includes: selecting first and second standard cells from a standard-cell-library; the first and second standard cells having corresponding first and second heights that are different from each other; stacking the first standard cell on the second standard cell to form a third cell; and including the third cell in a layout diagram. At least one aspect of the method is executed by a processor of a computer.