Mixed-Length TSV Assembly for Heterogeneous Chip Routing
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Solution Overview
Problem
Conventional semiconductor packaging processes face challenges in efficiently routing electrical connections for heterogeneous semiconductor devices with increasing complexity and shrinking scale, particularly in forming through-silicon vias (TSVs) that connect devices of varying lengths within semiconductor assemblies.
Innovation Solution
The implementation of semiconductor device assemblies with pluralities of TSVs of different lengths, formed after preliminary assembly and optional testing, which utilize both front-side and rear-surface connections to ensure functional integrity and facilitate bonding without mechanical damage from probe operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional packaging processes are used to route electrical connections for heterogeneous semiconductor devices, then the devices can be packaged and protected, but the complexity of routing electrical connections increases and the scale shrinks
Solution Approach 1:
The patent segments the electrical connection routing into two distinct approaches: front-side connections for devices requiring probe operations, and rear-surface connections for devices where probe operations are not required. This segmentation allows each connection type to be optimized independently, reducing overall routing complexity while maintaining adaptability for heterogeneous device integration.
2Reliability
If TSVs are formed before assembly, then the devices can be connected, but mechanical damage may occur from probe operations
Solution Approach 1:
The patent applies preliminary action by forming TSVs through the substrate before assembly, but strategically places these TSVs on the rear surface where they will not interfere with subsequent probe operations on the front side. This preliminary formation of connection structures eliminates the need for probe operations to create TSVs during assembly, thereby preventing mechanical damage while ensuring functional integrity.
3Adaptability or versatility
If devices of varying lengths are integrated into assemblies, then the assemblies can accommodate heterogeneous components, but the routing of electrical connections becomes more challenging
Solution Approach 1:
The patent transitions from two-dimensional front-side connection routing to three-dimensional routing by utilizing the rear surface of substrates. This dimensional change allows electrical connections to be routed from the back side, providing additional spatial freedom to connect devices of varying lengths without the constraints of planar routing, thereby easing manufacturing while maintaining adaptability for heterogeneous integration.
Data Source
AI summary
A semiconductor device assembly includes a first semiconductor device having front and rear surfaces, a plurality of front-side pads disposed over the front surface at a first distance from the rear surface, and a plurality of additional device pads disposed over the front surface at a second distance from the rear surface greater than the first distance; a second semiconductor device in contact with a top side of each of the additional device pads; an encapsulant material at least partially surrounding the second semiconductor device and covering a top side of the front-side pads; a first plurality of TSVs, each extending from the rear surface through the first semiconductor device to a bottom side of one of the front-side pads; and a second plurality of TSVs, each extending from the rear surface through the first semiconductor device to a bottom side of corresponding one of the additional device pads.