Mixed-Mode Echo Cancellation Before FFE for Low-Power Wireline Links
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Solution Overview
Problem
Conventional digital domain echo and crosstalk cancellation using FIR filters in wireline communications is complex and power-intensive, especially in large FIR filter implementations, which is not cost-effective and adaptable to existing processing systems.
Innovation Solution
Implementing an analog echo and crosstalk cancellation system that subtracts echo and NEXT (and FEXT) components prior to the feed forward equalization (FFE) filter, allowing for a practical analog implementation and reducing the dynamic range limitations, particularly suitable for low power CMOS designs, using a mixed-signal FIR filtering technique with digital-to-analog converters (DACs) for multiplication and current summing for subtraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional digital domain FIR filters are used for echo and crosstalk cancellation, then effective cancellation is achieved, but device complexity and power consumption increase significantly
Solution Approach 1:
The patent replaces the digital domain FIR filter system with an analog domain implementation using operational amplifiers, capacitors, and resistors to perform the same echo and crosstalk cancellation function. This substitution of digital electronic systems with analog circuitry reduces device complexity and power consumption while maintaining cancellation effectiveness.
Solution Approach 2:
The patent introduces an analog summer circuit as an intermediary component that combines the original received signal with the canceled echo and crosstalk signals in the analog domain before feeding to the ADC, thereby avoiding the need for complex digital signal processing.
2Measurement precision
If large FIR filter sizes are used for accurate cancellation, then cancellation precision improves, but power consumption and silicon area increase
Solution Approach 1:
The patent substitutes the power-intensive digital FIR filter computation with a passive analog circuit implementation using operational amplifiers and passive components, which consumes significantly less power while achieving the same filtering and cancellation precision.
Solution Approach 2:
The patent changes the domain of operation from digital to analog, transforming the computational parameters into physical circuit parameters (voltages, currents, time constants) that can be processed with lower power consumption while maintaining the same functional outcome.
3Measurement precision
If high resolution ADC is used to digitize the signal before cancellation, then signal fidelity is maintained, but device complexity and cost increase
Solution Approach 1:
The patent performs echo and crosstalk cancellation in the analog domain before the signal is digitized by the ADC. This preliminary action removes unwanted signals beforehand, allowing the use of lower resolution ADCs while maintaining overall signal fidelity and reducing device complexity.
Solution Approach 2:
The analog summer circuit serves as an intermediary that combines the canceled signals in the analog domain, allowing the ADC to process a cleaner signal with fewer artifacts, thereby reducing the required ADC resolution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the cancellation process, reduces power consumption, and allows for dynamic range expansion, making it suitable for low power CMOS designs with limited supply voltages, while maintaining effective echo and crosstalk removal.
Implementation Method 1
Implementing an analog echo and crosstalk cancellation system that subtracts echo and NEXT (and FEXT) components prior to the feed forward equalization (FFE) filter
Implementation Method 2
using a mixed-signal FIR filtering technique with digital-to-analog converters (DACs) for multiplication and current summing for subtraction
Data Source
AI summary
A signal processing system includes an AGC and pre-echo cancellation system for receiving an analog signal, amplifying signal magnitude (over all frequencies) to a pre-determined level by AGC, and removing the immediate transmit pulse from this received signal by pre-echo canceller to provide a second analog signal. The signal processing system also includes a summer for receiving the analog signal; a feed forward equalization (FFE) unit for receiving a signal from the summer; and a slicer for receiving a signal from the FFE unit and providing an output signal. The signal processing system also includes an Echo and NEXT or FEXT cancellation system for receiving the output signal and for providing a signal to the summer for canceling the echo and crosstalk in the signal processing system. The Echo and crosstalk components associated with a signal processing system can be subtracted prior to the FFE.