Mixed Mode Memory Cell Volatile Non-Volatile Switching
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Solution Overview
Problem
Current memory technologies, such as SRAM and DRAM, are volatile, losing data when power is turned off, limiting their adaptability and compatibility with devices requiring different storage modes without requiring changes to the memory circuit design.
Innovation Solution
A mixed mode memory system comprising a memory array with mixed mode memory cells that can operate in both volatile and non-volatile storage modes, controlled by a selection voltage, allowing for flexible storage modes without altering the circuit design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory systems use fixed volatile storage mode (SRAM/DRAM), then high speed and low power consumption are achieved, but adaptability to devices requiring different storage modes deteriorates
Solution Approach 1:
The memory cell is designed with dual functionality to operate in both volatile storage mode and non-volatile storage mode using the same circuit structure. By configuring the selection circuit based on voltage levels, a single memory cell can serve multiple storage mode requirements, eliminating the need for separate memory designs for different applications.
Solution Approach 2:
The storage mode of the memory cell is controlled by changing the voltage parameter of the selection circuit. When the second voltage level is applied, the selection circuit configures the memory cell for non-volatile storage mode, while a different voltage level configures it for volatile storage mode. This parameter-based control enables mode switching without structural modifications.
2Adaptability or versatility
If separate memory designs are used for volatile and non-volatile storage modes, then specific device requirements are met, but development cost increases
Solution Approach 1:
A single memory cell design with multi-functional capability is implemented, allowing the same circuit to be configured for either volatile or non-volatile storage mode. This universal design approach eliminates the need to develop and manufacture separate memory products for different storage mode requirements, thereby reducing development costs.
Solution Approach 2:
The memory cell incorporates dynamic reconfigurability through the selection circuit, which can change its configuration based on applied voltage levels. This dynamic characteristic allows the memory to adapt its storage mode during operation or manufacturing, providing flexibility without requiring multiple fixed designs.
3Reliability
If memory cells are configured for non-volatile storage mode, then data retention without power is achieved, but speed and power consumption characteristics deteriorate
Solution Approach 1:
The memory cell's operational characteristics are controlled by voltage parameters applied to the selection circuit. By adjusting these voltage parameters, the memory cell can be configured for non-volatile storage mode with enhanced data retention or for volatile storage mode with faster access speeds, allowing optimization based on specific application requirements.
Data Source
AI summary
A mixed mode memory comprises a memory array, a word line decoder, an intermediary circuit and a reading and writing circuit, wherein the word line decoder is electrically coupled to the memory array, and the intermediary circuit is electrically coupled to the memory array and the writing circuit. The memory array comprises mixed mode memory cells with each cell comprising a reading and writing component group, a storage circuit and a selection circuit. The reading and writing component group is electrically coupled to a word line which controls the reading and writing component group to be conducted or not conducted, and electrically coupled to two bit lines which respectively transmit two data signals. The storage circuit generates two reading response signals based on a reading drive signal. The selection circuit controls the storage circuit to operate in a volatile or non-volatile storage mode based on a selection voltage.