Mixed-Mode Memory Read Control for Reduced Read Disturb

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Solution Overview

Problem

Conventional memory devices are restricted to operating in a single storage region type mode, such as either TLC or QLC, due to limited register capacity, which limits flexibility and efficiency in supporting multiple storage region types within the same die.

Innovation Solution

A memory device is designed to function as both a QLC and a TLC chip by performing separate read operations for different storage region types, using distinct device parameter information for each, thereby mitigating read disturb issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a memory device uses a single storage region type mode (TLC or QLC), then the device can operate with simpler control logic, but the flexibility and efficiency in supporting multiple storage region types is limited

Engineering Contradiction:

Improveflexibility in supporting multiple storage region typesVSAvoidcontrol logic complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple storage regions (first storage region and second storage region) with different storage region types (e.g., QLC and TLC). Each region has its own dedicated read operations and parameter information, allowing the system to segment the complexity of supporting multiple modes across separate, manageable units rather than handling all modes uniformly.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The memory device is designed to function as both a QLC chip and a TLC chip within the same device. The control circuitry is configured to perform different read operations (first read operation for QLC, second read operation for TLC) depending on the selected storage region type, enabling a single device to serve multiple functions and storage needs.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If separate read operations are performed for different storage region types, then read disturb is reduced and reliability is improved, but the number of operations and time required increases

Engineering Contradiction:

Improvereliability of memory operationsVSAvoidtime for read operations

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

Device parameter information for different storage region types is stored in advance in separate blocks (first block for QLC, second block for TLC). This preliminary storage of configuration data allows the control circuitry to quickly access the appropriate parameters without performing time-consuming operations during the actual read process, reducing overall time loss while maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The read operation is extracted and specialized for each storage region type. Instead of using a single universal read operation that causes read disturb, the system performs a first read operation for the first storage region type and a second read operation for the second storage region type, separating the read functions to eliminate harmful cross-region interference.

Inventive Principle:

Principle #2Taking out (Extraction)

3Object-affected harmful factors

If device parameter information for different storage region types is stored in separate blocks, then read disturb is mitigated, but the memory device requires more blocks and storage capacity

Engineering Contradiction:

Improveread disturbVSAvoidnumber of memory blocks

Core Design Contradiction:

Object-affected harmful factorsVSQuantity of substance

Solution Approach 1:

Separate blocks are introduced as intermediary storage structures to hold device parameter information for different storage region types. The first block stores parameters for the first storage region type while the second block stores parameters for the second storage region type. These intermediary blocks act as mediators that prevent read disturb by isolating parameter access to specific blocks rather than requiring a single shared block.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20250259684A1Read method enhancement to reduce read disturb in mixed-mode memory storage regions

Publication Date: 2025.08.14 SANDISK TECHNOLOGIES LLC

AI summary

Embodiments disclosed herein are directed to a non-volatile storage system comprising a non-volatile memory including non-volatile storage elements and control circuitry. The control circuitry is configured to: perform a first read operation to access device parameter information for a first memory operation associated with a first storage region type, the device parameter information associated with the first storage region type stored in a first block of a plurality of blocks; perform the first memory operation, using the device parameter information associated with the first storage region type; perform a second read operation to access device parameter information for a second memory operation associated with a second storage region type, the device parameter information associated with the second storage region type stored in a second block of the plurality of blocks; and perform the second memory operation, using the device parameter information associated with the second storage region type.