Mixed-Mode Memory Block Wear Tracking for Balanced PEC Allocation
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Solution Overview
Problem
Existing memory sub-systems fail to differentiate between SLC, TLC, and QLC mode blocks in monitoring program/erase cycles, leading to unnecessary stress and reduced system capability due to assuming uniform cycling capability, which can degrade cell endurance and reliability.
Innovation Solution
Implementing a block PEC component to monitor and track program/erase cycles specifically for each type of block (SLC, TLC, QLC) individually, allowing for selecting the next block based on the lowest PEC count or ratio, ensuring optimal usage and balancing wear across different modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If uniform PEC monitoring is applied to all block types (SLC, TLC, QLC), then device complexity is reduced, but reliability deteriorates due to inappropriate wear management
Solution Approach 1:
The patent segments the monitoring mechanism by creating separate PEC counters for each block type (SLC, TLC, QLC) within the memory sub-system. This segmentation allows each block type to be monitored independently with its own wear characteristics, resolving the contradiction by maintaining reliability through type-specific monitoring while keeping the overall structure organized and manageable.
Solution Approach 2:
The patent applies local quality by tailoring the PEC monitoring and block selection criteria to each specific block type. Different block types have different program/erase cycle tolerances, and the system adjusts its monitoring and selection behavior locally for each type, ensuring optimal reliability for SLC blocks while appropriately managing TLC and QLC blocks with their respective wear characteristics.
2Ease of operation
If mixed mode blocks are managed without type differentiation, then ease of operation is improved, but loss of information increases due to untracked wear patterns
Solution Approach 1:
The patent implements a universal PEC monitoring framework that handles multiple block types (SLC, TLC, QLC) through a common interface and control logic. The block selection component can operate uniformly across different block types while internally applying type-specific criteria, thus maintaining ease of operation while preventing loss of wear information through differentiated tracking.
Solution Approach 2:
The patent employs feedback mechanisms where the PEC counters continuously track wear for each block type and feed this information back to the block selection component. This feedback loop ensures that wear patterns are accurately tracked and used to make informed block selection decisions, preventing information loss while maintaining operational simplicity through automated management.
3Productivity
If blocks are selected without considering individual PEC counts, then productivity is improved through faster allocation, but reliability deteriorates due to unbalanced wear distribution
Solution Approach 1:
The patent applies preliminary action by pre-calculating and maintaining PEC counters for all blocks before they are selected for data storage. The block selection component uses these pre-prepared wear counters to quickly determine the most suitable block, combining fast allocation with reliable wear balancing. This preliminary tracking enables rapid decision-making without sacrificing wear distribution integrity.
Data Source
AI summary
An apparatus can include a block program erase count (PEC) component. The block PEC component can monitor a quantity of program erase counts (PECs) for each particular type of block of a non-volatile memory array. The block PEC component can further determine which block of the superblock to write host data to next based on the quantity of PECs. The block PEC component can further write host data to the determined block.