Mixed-Mode PLL with Analog Phase Correction for Fractional-N Noise
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Solution Overview
Problem
Digitally controlled oscillator-based phase locked loops (PLLs) face limitations in fractional-N operations due to quantization errors from time to digital converters (TDCs), leading to increased noise and spurs, as well as sensitivity to power supply noise and aliasing, which conventional digital algorithms cannot effectively address.
Innovation Solution
A mixed-mode PLL architecture incorporating an analog phase correction path with a linear phase correction unit (LPCU) and a digital frequency correction path, replacing the noisy TDC with the LPCU to reduce noise and spurs, while maintaining the benefits of digital capacitors through a digital integral path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a digitally controlled oscillator-based PLL uses a digital loop filter, then noise induced by gate oxide leakage is eliminated and output frequency can be digitally calibrated, but the PLL is limited to integer-N operations because quantization errors of a digital PFD increase noise and spur in fractional-N operations
Solution Approach 1:
The invention divides the phase detection function into two separate paths: a digital PFD for integer-N operations and an analog PFD for fractional-N operations. This segmentation allows each path to be optimized for its specific function, eliminating the quantization errors that plague digital PFDs in fractional-N mode while preserving the noise immunity benefits of digital processing where applicable.
Solution Approach 2:
The invention introduces an analog PFD as an intermediary component between the reference signal and the digital processing stages. This analog PFD converts the phase difference into an analog voltage that can represent fractional phase errors with high precision, avoiding the quantization problems of digital PFDs while still allowing digital loop filtering downstream.
2Measurement precision
If the loop bandwidth is set narrower to suppress quantization errors and out-of-band noises from TDC, then these errors are reduced, but in-band noises induced by the TDC still cannot be filtered and less DCO noise is filtered resulting in increased in-band phase noise
Solution Approach 1:
The analog PFD acts as an intermediary that converts phase differences into analog voltages before digital processing. This analog representation preserves fine phase resolution without the quantization errors inherent in digital TDCs, allowing the loop to maintain narrow bandwidth for error suppression while still filtering in-band noise effectively through the analog path.
3Measurement precision
If a digitally-implemented ring type TDC is used to achieve large dynamic range and fine resolution, then both range and resolution are improved, but the design becomes more sensitive to power supply because high frequency noises induced by power noise are aliased to low frequency domain
Solution Approach 1:
The invention replaces the digitally-implemented ring type TDC with an analog PFD that uses analog circuitry instead of digital switching. This substitution eliminates the aliasing effect where power noise at high frequencies folds into the low-frequency band, while still achieving the desired dynamic range and resolution through analog voltage representation of phase differences.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a PLL that is insensitive to non-linearity and quantization errors, achieving lower phase noise, twice the loop bandwidth, and being fractional spur-free, with improved power supply rejection ratio (PSRR) and reduced transient noise.
Implementation Method 1
a varactor having two ends thereof coupled to the bias circuit
Data Source
AI summary
A mixed-mode PLL is disclosed. The mixed-mode PLL comprises an analog phase correction path and a digital frequency correction path. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit.