Mixed Operand Size Instruction Processing for Indirect Addressing
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Solution Overview
Problem
Data processing systems face inefficiencies when performing operations on operands of different sizes, as they require additional size conversion instructions, which waste processing speed and energy and negate storage efficiency advantages.
Innovation Solution
The introduction of mixed operand size instructions that convert input operands to the same size and perform a dependent operation, such as arithmetic or load/store operations, eliminating the need for separate size conversion instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If size conversion instructions are used to perform operations on operands of different sizes, then the data processing operation can be completed, but processing speed decreases and energy consumption increases
Solution Approach 1:
The patent merges the size conversion operation and the data processing operation into a single mixed operand size instruction. The decoder circuitry identifies mixed operand size instructions and generates control signals that perform both operand size conversion and the specified data processing operation (such as addition, subtraction, or memory access) in one unified execution flow, eliminating the need for separate conversion instructions and improving processing efficiency
2Productivity
If size conversion instructions are used to perform operations on operands of different sizes, then the data processing operation can be completed, but the number of instructions increases
Solution Approach 1:
The patent combines multiple operations (size conversion and data processing) into a single mixed operand size instruction that is decoded and executed as one unified operation, reducing the total number of instructions required and simplifying the instruction sequence while maintaining full functionality
3Adaptability or versatility
If operands are stored with larger bit size to accommodate different size operations, then operations on different sized operands become possible, but storage efficiency decreases
Solution Approach 1:
The patent enables each operand to be stored and processed in its native, optimal size without requiring uniform sizing across all operands. The mixed operand size instruction allows the first operand to remain at its original size while the second operand is converted only when needed for the specific operation, preserving storage efficiency while enabling flexible operations on operands of different sizes
Data Source
AI summary
A data processing system 2 includes a processor core 4 and a memory 6. The processor core 4 includes processing circuitry 12, 14, 16, 18, 26 controlled by control signals generated by decoder circuitry 24 which decodes program instructions. The program instructions include mixed operand size instructions (either load/store instructions or arithmetic instructions) which have a first input operand of a first operand size and a second input operand of a second input operand size where the second operand size is smaller than the first operand size. The processing performed first converts the second operand so as to have the first operand size. The processing then generates a third operand using as inputs the first operand of the first operand size and the second operand now converted to have the first operand size.