Mixed Ordering RAID Stripe Resiliency for Solid-State Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current data storage systems face challenges in maintaining reliability due to variations in error rates across different storage media, which can overwhelm error correction mechanisms, especially when dealing with high error rates during data access.
Innovation Solution
The implementation of a mixed ordering scheme for RAID stripes across heterogeneous solid-state memory, where data is written in a way that distributes reliability variations, using non-volatile RAM as a buffer to improve write latency and manage wear leveling, and employing erasure coding and mirroring to enhance data resilience.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction code (ECC) data and RAID technology are used to safeguard against failures, then data reliability is improved, but the system can be overwhelmed when the number of errors exceeds the error correction capability
Solution Approach 1:
The patent segments storage devices into different reliability groups based on their error rates. By dividing the storage system into multiple groups with varying reliability characteristics, the system can apply appropriate error correction strategies to each group, preventing any single high-error device from overwhelming the entire error correction mechanism.
Solution Approach 2:
The patent applies different error correction codes and RAID configurations to different storage devices based on their individual reliability characteristics. High-reliability devices may use simpler protection schemes while low-reliability devices receive more robust error correction, optimizing the balance between reliability and complexity locally rather than uniformly across the entire system.
2Productivity
If denser storage media and larger storage capacity are implemented, then storage performance is improved, but variations in error rates across different storage media increase
Solution Approach 1:
The patent implements local quality by characterizing each storage device's error rate individually and applying tailored error correction strategies. This allows the system to maintain high storage capacity using dense media while compensating for variations in error rates across different devices through device-specific protection schemes.
Solution Approach 2:
The patent changes the parameter of error correction strength based on the observed error rates of individual storage devices. By dynamically adjusting error correction parameters according to each device's characteristics, the system can accommodate denser storage media with varying reliability while maintaining overall system data integrity.
3Reliability
If mixed ordering scheme for RAID stripes is implemented across heterogeneous solid-state memory, then read reliability is improved, but write operations become more complex
Solution Approach 1:
The patent performs preliminary actions by pre-characterizing storage devices and pre-determining optimal RAID stripe ordering patterns before actual data operations. This advance preparation allows the system to achieve improved read reliability through mixed ordering while reducing write operation complexity, as the ordering strategy is established beforehand rather than computed in real-time during writes.
4Loss of time
If non-volatile RAM is used as a buffer to improve write latency, then write performance is improved, but system complexity increases
Solution Approach 1:
The patent introduces non-volatile RAM as an intermediary buffer between the host system and persistent storage devices. This intermediary layer absorbs write operations temporarily, improving write latency by decoupling write submission from write completion, while managing wear leveling and data integrity through the buffer without requiring complex changes to the underlying storage devices.
Data Source
AI summary
A storage system has a resiliency scheme to enhance storage system performance. The storage system composes a RAID stripe. The storage system mixes an ordering of portions of the RAID stripe, based on reliability differences across portions of the solid-state memory. The storage system writes the mixed ordering RAID stripe across the solid-state memory.