Mixed-Pitch Die Interconnect Assembly for Dense Chip Packaging

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Solution Overview

Problem

Conventional substrates constrain interconnect pitch due to manufacturing, materials, and thermal considerations, limiting the ability to connect and stabilize integrated circuit dies effectively.

Innovation Solution

A microelectronic assembly design that includes a package substrate with mixed-pitch interconnects, allowing for the attachment of multiple IC dies with DTPS and DTD interconnects, enabling higher bandwidth and power efficiency while reducing package size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional substrates are used for coupling integrated circuit dies, then mechanical stability is achieved, but interconnect pitch is constrained by manufacturing, materials, and thermal considerations

Engineering Contradiction:
Improveinterconnect pitchVSAvoidmanufacturing constraints
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The substrate is divided into a fine-pitch interconnect region and a coarse-pitch interconnect region, allowing different pitch requirements to be satisfied in different areas. This segmentation enables high-density die attachment while maintaining manufacturability through separate manufacturing processes for each region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are provided with different interconnect pitch characteristics - the fine-pitch region supports high-density connections for multiple dies, while the coarse-pitch region accommodates standard connection requirements. This local differentiation resolves the contradiction by providing appropriate pitch in each location rather than uniform pitch across the entire substrate.

Inventive Principle:
Principle #3Local quality

2Power

If multiple IC dies are attached to achieve higher bandwidth and power efficiency, then performance is improved, but package size increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidpackage size
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

Multiple IC dies are merged into a single package assembly with shared coarse-pitch interconnects to the substrate. This combining approach allows multiple high-performance dies to operate together while sharing common connection infrastructure, improving power efficiency and bandwidth without linearly increasing package size.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Multiple fine-pitch dies are nested together in close proximity, with their interconnects converging to shared coarse-pitch connections on the substrate. This nesting arrangement maximizes the use of package area by stacking functional elements vertically and horizontally, achieving high integration density while controlling overall package footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Manufacturing precision

If fine-pitch interconnects are used for multiple die attachment, then connection density is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveinterconnect pitchVSAvoidpackage complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The manufacturing process is segmented into separate stages: fine-pitch interconnect formation for die attachment, followed by coarse-pitch interconnect formation for substrate connections. This segmentation allows each manufacturing step to be optimized independently, reducing overall process complexity while achieving high precision where needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fine-pitch interconnect structure is prepared in advance on the substrate before die attachment. This preliminary action allows the complex fine-pitch features to be manufactured once and reused for multiple die connections, simplifying the overall manufacturing process by separating the complex fabrication step from the simpler assembly steps.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12500177B2Microelectronic assemblies with communication networks
Publication Date: 2025.12.16 INTEL CORP
  • US12500177B2 patent drawing
  • US12500177B2 patent drawing
  • US12500177B2 patent drawing

AI summary

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.