Mixed-Precision NB-LDPC Decoder for Quantization Tradeoffs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-binary low-density parity-check (NB-LDPC) codes offer superior error correction performance but come with increased decoding complexity, making hardware implementation challenging due to the need for high precision in quantization widths, which affects both hardware complexity and raw bit error rate (RBER) performance.
Innovation Solution
A hybrid decoder with mixed precision components, utilizing different quantization widths for various decoding stages, allocates more bits to messages with higher dynamic range and fewer bits to those with lower dynamic range, employing left and right shifts to preserve most significant bits, thereby improving RBER performance while reducing hardware complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high precision quantization width is used for NB-LDPC decoding, then RBER performance is improved, but hardware complexity increases
Solution Approach 1:
The patent applies different quantization precisions to different components within the decoder based on their specific requirements. Check node processing units use lower precision (e.g., 4-bit) while variable node processing units use higher precision (e.g., 6-bit or 8-bit). This local differentiation maintains RBER performance where needed while reducing overall hardware complexity by avoiding uniform high precision across all components.
Solution Approach 2:
The patent dynamically adjusts the quantization width parameter based on the decoding stage and message type. By changing the precision parameter adaptively rather than using a fixed high precision value throughout, the system achieves good error correction performance while significantly reducing the number of bits required for representation, thereby lowering hardware complexity.
2Reliability
If uniform high precision is used across all decoding stages, then RBER performance is maintained, but power consumption increases
Solution Approach 1:
Different quantization precisions are assigned to different decoding stages and message types based on their specific reliability requirements. Check node operations use lower precision while variable node operations use higher precision, optimizing the balance between power consumption and error correction performance across the entire decoding process.
Solution Approach 2:
The patent applies high precision only where absolutely necessary for maintaining RBER performance, rather than uniformly across all operations. By using lower precision for check node processing and higher precision only for variable node processing where it critically impacts performance, the system achieves partial application of high precision that suffices for overall reliability while reducing power consumption.
3Device complexity
If lower quantization width is used, then hardware complexity is reduced, but RBER performance deteriorates
Solution Approach 1:
The patent strategically assigns lower quantization width to check node processing units where it sufficiently reduces hardware complexity, while maintaining higher quantization width for variable node processing units where performance is more sensitive. This localized application of different precision levels optimizes the tradeoff between hardware complexity and RBER performance.
Solution Approach 2:
The system dynamically changes the quantization width parameter based on the specific decoding operation being performed. By adapting the precision parameter to match the requirements of each decoding stage rather than using a uniformly low precision value, the system achieves low hardware complexity while avoiding RBER performance deterioration.
4Use of energy by moving object
If mixed precision components are used, then power efficiency is improved, but implementation complexity increases
Solution Approach 1:
The decoder is segmented into distinct functional blocks (check node processing units and variable node processing units) that each use appropriately tailored quantization precisions. This segmentation allows independent optimization of each block's precision requirements, improving overall power efficiency while managing implementation complexity through modular design.
Solution Approach 2:
The patent employs a unified mixed-precision decoding framework that can handle multiple message types and decoding stages with different precision requirements using a common architectural approach. This universal framework reduces implementation complexity by providing a standardized method for managing mixed precision across diverse operational contexts.
Data Source
AI summary
An embodiment of an electronic apparatus may comprise one or more substrates, and a decoder coupled to the one or more substrates, the decoder including logic to perform a first decode stage with a first fixed quantization width, and perform a second decode stage with a second fixed quantization width that is different from the first fixed quantization width. Other embodiments are disclosed and claimed.