Programmable Mixed-Radix DFT Processor Job Scheduling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional pipelined FFT architectures for wireless communication networks, particularly in LTE transceivers, face challenges with complex configurations and high resource utilization when processing various FFT sizes and mixed-radix operations, leading to inefficiencies in hardware usage and scalability.
Innovation Solution
A programmable vector processor with a ping-pong vector memory bank, twiddle factor generator, and configurable mixed-radix engine that performs radix3, radix4, radix5, and radix6 DFT calculations, along with a job scheduler that bundles jobs by point size to reduce overhead and enhance efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple physical radix processors are laid out in series to create a pipeline for streaming data, then data throughput is improved, but device complexity and hardware resource utilization increase
Solution Approach 1:
The patent implements a single reconfigurable radix processor that can dynamically perform different radix operations (radix-2, radix-3, radix-4, radix-5, radix-6) by loading appropriate configuration data and twiddle factors. This universal processor replaces multiple dedicated physical processors, achieving the same pipeline throughput while significantly reducing hardware complexity and resource utilization.
Solution Approach 2:
The radix processor is designed with dynamic reconfiguration capability, where the operation type (radix value) can be changed during runtime by loading different configuration parameters and twiddle factor sets. This dynamic adaptability allows one processor to function as multiple specialized processors would, maintaining productivity while reducing device complexity.
2Adaptability or versatility
If the number of pipeline stages is increased to support larger FFT sizes, then processing capability is improved, but device complexity and configuration difficulty increase
Solution Approach 1:
The patent supports variable FFT sizes by dynamically changing operational parameters including the number of pipeline stages, radix values, and twiddle factor sets. The processor can be reconfigured for different FFT lengths (e.g., 64, 128, 256, 512 points) by loading appropriate configuration data, enabling adaptable processing capability without increasing inherent device complexity.
Solution Approach 2:
A single reconfigurable processor unit handles multiple FFT size requirements and mixed-radix operations that would traditionally require multiple dedicated processor stages. The universal design allows the same hardware to be dynamically allocated to different pipeline configurations based on the specific processing task.
3Adaptability or versatility
If multiple DFT jobs with different point sizes are processed sequentially, then job flexibility is improved, but processing time and overhead increase
Solution Approach 1:
The processor performs preliminary configuration by pre-loading twiddle factors and operational parameters for different DFT point sizes into memory before execution. This preliminary preparation enables rapid switching between different job types without significant reconfiguration overhead, reducing the time loss when processing multiple jobs with different parameters.
Solution Approach 2:
The processor maintains continuous operation by overlapping data transfer and computation phases, and by keeping configuration data and twiddle factors pre-loaded in memory. This continuity minimizes idle time between jobs and maintains high utilization even when processing diverse DFT jobs with different point sizes.
Data Source
AI summary
Methods and apparatus for job scheduling in a programmable mixed-radix DFT/IDFT processor. In one embodiment, a system for processing network data from a wireless communications network includes a vector pipeline, a programmable mixed radix engine, and a job scheduler. The vector pipeline is configured to scale, stage, and multiply twiddle factor to vector data from a mega-job. The programmable mixed radix engine is configurable for computing jobs bundled in the mega-job in accordance with a DFT of a particular point size. The job scheduler is operable to bundle multiple discrete Fourier transform (DFT) jobs having a substantially same point size into the mega-job after obtaining the DFT jobs.