Mixed Redundancy for Multichip Interconnect Yield

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Solution Overview

Problem

Multichip integrated circuit packages face low yield due to manufacturing defects in inter-die trace connections, requiring complex encoding circuits that consume valuable die area and excessive power, which affects performance.

Innovation Solution

A mixed redundancy scheme is implemented, combining active and passive redundancy schemes within the package. Active redundancy uses JTAG circuitry to identify and bypass defective paths, while passive redundancy employs duplicate conductive lines for critical signals, ensuring robust inter-die connections without significant area or power overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex encoding circuits are used to protect against inter-die trace defects, then reliability is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improveassembly yieldVSAvoidencoding circuits
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the redundancy protection into two distinct parts: passive redundancy for critical control signals (power-on-reset, initialization, synchronization) and active redundancy for data transfer paths. This segmentation allows each type of signal to use the most appropriate redundancy method, reducing overall complexity compared to using a single complex encoding scheme for all signals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different redundancy qualities to different parts of the system: passive redundancy (duplicate conductive lines) is applied locally to critical control signals that require immediate failover, while active redundancy (reconfigurable paths) is applied to data transfer paths where reconfiguration can occur during operation. This local differentiation optimizes both reliability and complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If complex encoding circuits are used to protect against inter-die trace defects, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improveassembly yieldVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

By segmenting redundancy protection into passive and active components, the patent reduces power consumption compared to using full active redundancy encoding for all signals. Passive redundancy uses simple duplicate wire connections without active encoding/decoding circuits, thereby eliminating the excessive power consumption associated with complex encoding schemes while maintaining protection for critical signals.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If more dies are placed in a single package to meet application demands, then integration density is improved, but manufacturing yield decreases due to increased inter-die trace defects

Engineering Contradiction:
Improveintegration densityVSAvoidassembly yield
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by incorporating both passive and active redundancy paths during package manufacturing. Passive redundancy provides immediate failover capability for critical signals, while active redundancy provides reconfigurable paths for data transfer. This prior preparation of multiple paths cushions against the increased probability of inter-die trace defects that arises from having more dies in a single package.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Reliability

If active redundancy scheme is used to repair defective interconnect paths, then assembly yield is improved, but die area is consumed by redundancy circuitry

Engineering Contradiction:
Improveassembly yieldVSAvoiddie area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments redundancy implementation into passive duplicate lines for control signals and active reconfigurable paths for data transfer. This segmentation reduces the die area consumed by active redundancy circuitry because passive redundancy requires no additional active components, only duplicate conductive structures that can be formed as part of the standard interconnect process.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10591544B2Programmable integrated circuits with in-operation reconfiguration capability
Publication Date: 2020.03.17 ALTERA CORP
  • US10591544B2 patent drawing
  • US10591544B2 patent drawing
  • US10591544B2 patent drawing

AI summary

Integrated circuit packages with multiple integrated circuit dies are provided. A multichip package may include a master die that is coupled to one or more slave dies via inter-die package interconnects. A mixed (i.e., active and passive) interconnect redundancy scheme may be implemented to help repair potentially faulty interconnects to improve assembly yield. Interconnects that carry normal user signals may be repaired using an active redundancy scheme by selectively switching into use a spare driver block when necessary. On the other hand, interconnects that carry power-on-reset signals, initialization signals, and other critical control signals for synchronizing the operation between the master and slave dies may be supported using a passive redundancy scheme by using two or more duplicate wires for each critical signal.