Mixed-Signal Current-Summing Circuit for Low-Latency AI Inference

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Solution Overview

Problem

Traditional digital circuitry for implementing artificial intelligence models, such as neural networks, requires significant resources in terms of space, energy, and latency, making them unsuitable for edge devices where real-time inference and energy efficiency are crucial.

Innovation Solution

The development of mixed-signal integrated circuits with a binary-weighted global reference signal source, local differential current circuits, and a common-mode control circuit that perform weighted sum computations efficiently, reducing the need for large digital memory and energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional digital circuitry is used for weighted sum calculations in neural networks, then the system can store and process hundreds or thousands of weights, but the circuitry area and energy consumption increase significantly

Engineering Contradiction:
Improvecomputational accuracyVSAvoidcircuitry area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent replaces traditional digital circuitry with a mixed-signal system that uses analog current sources to perform weighted sum calculations. Current sources generate analog currents proportional to weight values, and these currents are summed directly in the analog domain, eliminating the need for digital multiplication and addition circuits. This substitution of analog physical quantities for digital computational operations reduces circuitry area while maintaining computational accuracy.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the domain of computation from digital to mixed-signal by using current magnitude as a continuous parameter to represent weight values. Instead of storing weights as digital values in memory, the system uses programmable current sources where the current magnitude directly encodes the weight parameter. This parameter change enables direct analog computation of weighted sums, reducing the need for large digital memory circuits.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If traditional digital circuitry is used for weighted sum calculations, then the system can compute neural network inferences, but the computing time and latency increase

Engineering Contradiction:
Improveinference speedVSAvoidcomputing latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent replaces sequential digital computation with parallel analog computation. Multiple current sources simultaneously generate currents representing different weight values, and these currents are summed in real-time through analog circuitry. This parallel physical process occurs continuously without the sequential clock cycles required by digital systems, dramatically reducing inference time and latency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The analog current-based computation allows for continuous operation without discrete sampling or clock cycles. The current sources continuously generate and sum currents representing the neural network computation, enabling real-time inference with no idle time between computational steps. This continuous action eliminates the time losses associated with digital system clocking and data transfer.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If traditional digital circuitry is used for neural network processing, then the system can perform pattern matching and classification, but the energy consumption increases

Engineering Contradiction:
Improvecompute powerVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent substitutes energy-intensive digital logic operations with low-power analog current processing. The mixed-signal system uses current mirrors and analog summation circuits that consume significantly less power than digital multipliers, adders, and memory access circuits. The physical nature of current flow allows for direct computation without the switching and capacitive charging/discharging that dominates digital energy consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the computational domain to exploit the energy efficiency of analog parameter processing. By representing weight values as current magnitudes and performing computations through physical current flow and summation, the system avoids the high energy cost of digital bit manipulation. This parameter change to continuous analog values enables compute power with minimal energy consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11296717B2System and methods for mixed-signal computing
Publication Date: 2022.04.05 MYTHIC INC
  • US11296717B2 patent drawing
  • US11296717B2 patent drawing
  • US11296717B2 patent drawing

AI summary

A mixed-signal integrated circuit that includes: a global reference signal source; a first summation node and a second summation node; a plurality of distinct pairs of current generating circuits arranged along the first summation node and the second summation node; a first current generating circuit of each of the plurality of distinct pairs that is arranged on the first summation node and a second current generating circuit of each of the plurality of distinct pairs is arranged on the second summation node; a common-mode current circuit that is arranged in electrical communication with each of the first and second summation nodes; where a local DAC adjusts a differential current between the first second summation nodes based on reference signals from the global reference source; and a comparator or a finite state machine that generates a binary output value current values obtained from the first and second summation nodes.