Mixed-Signal Fault Sensitivity Analysis for Analog Defect Detection
Solution Overview
Problem
The integrated circuit (IC) industry faces challenges in diagnosing faults in analog circuitry, particularly in mixed-signal ICs, due to the limitations of existing tools that focus on digital circuitry and are inadequate for the subtle design-process variations and systematic defects introduced by smaller IC features and increased analog circuitry.
Innovation Solution
A mixed-signal fault sensitivity analysis system and method that simulates faults in analog portions of ICs, ignoring or accounting for analog-to-digital and digital-to-analog events, using separate simulators for digital and analog circuitry, and comparing circuit states to detect faults by injecting faults into the circuit design and analyzing simulation results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If logic-level simulation tools are used for digital ICs, then defect diagnosis capability is improved, but applicability to analog circuitry deteriorates
Solution Approach 1:
The patent segments the mixed-signal IC into separate analog and digital circuit portions, applying different simulation methodologies to each. The analog portion uses circuit-level simulation while the digital portion uses logic-level simulation, allowing each domain to be analyzed with the most appropriate tool while maintaining overall system analysis capability.
Solution Approach 2:
The patent introduces an intermediary approach by using circuit-level simulation as a bridge between the analog and digital domains. This intermediary methodology can handle both analog circuitry directly and digital circuitry through appropriate abstraction, thereby extending the applicability of simulation tools across the entire mixed-signal IC.
2Ease of operation
If in-line inspection is used for analog circuitry, then fault detection is simplified, but diagnostic capability for subtle systematic defects deteriorates
Solution Approach 1:
The patent applies preliminary action by performing circuit-level simulation during the design phase to predict and identify potential systematic defects before manufacturing. This allows designers to anticipate defects related to sub-90 nm process variations and make design adjustments proactively, rather than relying solely on post-manufacturing inspection.
Solution Approach 2:
The patent replaces physical in-line inspection mechanisms with virtual circuit-level simulation. This substitution enables more comprehensive and precise analysis of analog circuit behavior under various fault conditions, providing superior diagnostic capability for subtle systematic defects while maintaining ease of operation through software-based analysis.
3Area of moving object
If mixed-signal IC features are reduced to sub-90 nm, then integration density is improved, but types of systematic defects increase
Solution Approach 1:
The patent addresses the increased complexity of systematic defects in sub-90 nm processes by changing the simulation parameters and methodology. Circuit-level simulation with detailed analog models allows for accurate representation of process variations and their impact on circuit performance, enabling designers to diagnose and mitigate the increased types of systematic defects that arise at smaller feature sizes.
Data Source
AI summary
An apparatus and method for conducting fault sensitivity analysis of the analog portions of a mixed signal circuit design includes simulating the fault free circuit design, inserting a fault into the analog portion of the circuit design, simulating the circuit design with the fault during a fault interval time period, and determining whether the fault is detectable.