Mixed-Signal Logic Supply Regulation for Low-Voltage Drop Suppression
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Solution Overview
Problem
Mixed signal circuits experience significant logic supply voltage drops when the external supply voltage is low, such as 1.8V or less, due to insufficient current drive capability of the power supply circuit, especially when the logic circuit consumes high power or high current.
Innovation Solution
Incorporating a first regulator circuit with a PMOS transistor and a second regulator circuit with an NMOS transistor, powered by an analog supply voltage higher than the logic supply voltage, to enhance current drive capability and maintain the logic supply voltage within a specified range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a low dropout (LDO) voltage regulator is used to generate logic supply voltage from low external supply voltage (1.8V or less), then the logic supply voltage can be generated, but the logic supply voltage drops significantly when the logic circuit consumes high power or high current
Solution Approach 1:
The patent combines a first regulator circuit (PMOS-based) and a second regulator circuit (NMOS-based) to work together in driving the logic supply line. The first regulator circuit generates the logic supply voltage from external supply voltage, while the second regulator circuit receives analog supply voltage (higher than logic supply voltage) to drive the logic supply line, providing sufficient current drive capability and preventing voltage drops under high current conditions
Solution Approach 2:
The patent introduces an intermediary power supply circuit that includes both regulator circuits as a mediator between the external power source and the logic circuit. This intermediary circuit processes and conditions the power before delivering it to the logic circuit, ensuring stable voltage delivery even under high current demand
2Use of energy by moving object
If the external supply voltage is reduced to 1.8V or less, then power consumption is reduced, but the current drive capability becomes insufficient causing logic supply voltage drops
Solution Approach 1:
The patent changes the parameter of supply voltage by introducing a dual-regulator architecture where the second regulator circuit operates with analog supply voltage (higher than logic supply voltage) to provide adequate current drive capability, while the first regulator circuit handles the logic supply voltage generation from low external supply voltage, thus maintaining both low power consumption and sufficient current drive capability
Data Source
AI summary
A mixed signal circuit includes a logic circuit, an analog circuit, a logic supply line, a first regulator circuit, and a second regulator circuit. The analog circuit is configured to receive an analog supply voltage. The logic supply line is coupled to the logic circuit. The first regulator circuit includes an output p-channel metal oxide semiconductor (PMOS) transistor having a drain coupled to the logic supply line and a first former stage configured to receive a first logic supply voltage to drive a gate of the output PMOS transistor. The second regulator circuit includes an output n-channel metal oxide semiconductor (NMOS) transistor having a source coupled to the logic supply line and a second former stage configured to receive the analog supply voltage to drive a gate of the output NMOS transistor. The analog supply voltage is higher than the first logic supply voltage.