Mixed-Signal Simulation Proxy Blocks for Complex Topologies
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Solution Overview
Problem
Traditional mixed-signal simulation approaches often result in excessive digital-analog crossings and translator cells due to partitioning based on signal connectivity, leading to performance issues and limiting the reusability of design environments and mix-and-match capabilities of analog and digital simulators.
Innovation Solution
A design verification system that parses mixed-signal circuit designs to identify analog and digital blocks, flattens analog blocks into structural proxy blocks, and uses standard digital and analog solvers to elaborate and simulate these blocks separately, allowing for efficient simulation without tightly coupled custom elaboration engines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional partitioning approaches process signal connectivity to identify partition locations, then a standard and predictable partitioning technique is provided, but excessive digital-analog crossings and translator cells are created that hamper simulator performance
Solution Approach 1:
The patent segments the mixed-signal design into analog portions and digital portions by identifying analog design blocks and replacing them with structural proxy blocks. This segmentation allows the digital simulator to process digital portions independently while analog portions are handled separately, reducing the number of translator cells needed at interfaces and thereby improving simulator performance.
2Adaptability or versatility
If custom elaboration engines with tightly integrated analog and digital elaboration are used, then sandwich design structures can be elaborated, but the ability to reuse existing design environments and mix-and-match simulators from different vendors is lost
Solution Approach 1:
The patent introduces structural proxy blocks as intermediary elements that represent analog design blocks in the digital design hierarchy. These proxy blocks serve as a mediator between analog and digital domains, allowing standard digital simulators to elaborate digital portions while analog portions are handled by separate analog elaboration. This intermediary approach enables the use of standard, vendor-agnostic simulation tools rather than requiring tightly integrated custom engines.
3Productivity
If analog design blocks are replaced with structural proxy blocks and elaborated separately, then the number of translator cells is reduced and simulator performance improves, but additional elaboration steps are required
Solution Approach 1:
The patent performs preliminary replacement of analog design blocks with structural proxy blocks before digital elaboration. By pre-processing the design to substitute analog blocks with their proxy representations, the system enables standard digital simulators to elaborate digital portions without needing to understand analog circuitry, thereby improving performance while managing complexity through a systematic preliminary step.
Data Source
AI summary
A computing system implementing a design verification system can elaborate a mixed-signal circuit design having a complex sandwich hierarchy using a standard digital solver and a standard analog solver, as opposed to a tightly coupled custom elaboration engine. The design verification system can parse the mixed-signal circuit design to identify analog design blocks and flatten the analog design blocks into the structural proxy blocks having parameter connections to digital design blocks in the mixed-signal circuit design. The design verification system can replace an analog portion of the mixed-signal circuit design with the structural proxy blocks and elaborate the structural proxy blocks and digital design blocks associated with a digital portion of the mixed-signal circuit design. The design verification system can elaborate the analog portion of the mixed-signal design and simulate the elaborated analog portion with an analog simulator and the elaborated digital portion with a digital simulator.