Mixed-Signal Accumulator Circuit With Shared DAC for Edge AI
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Solution Overview
Problem
Traditional AI processing systems for neural networks are bulky, energy-intensive, and suffer from latency issues when deployed in edge devices due to their large circuitry requirements, making them unsuitable for efficient real-time inference and prediction in edge computing environments.
Innovation Solution
A mixed-signal integrated circuit architecture that includes a global digital-to-analog converter (DAC) sourcing analog reference signals to local accumulators via a shared signal path, allowing for efficient energy storage and computation, reducing the need for numerous high-precision DACs and minimizing circuit area, while enabling precise and energy-efficient AI computations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional AI processing systems are deployed in edge devices, then real-time inference capability is improved, but device size and energy consumption increase significantly
Solution Approach 1:
The patent segments the AI processing system into distributed micro-controllers or processing units, each capable of performing inference locally. This segmentation enables real-time processing at the edge while distributing the computational load, thereby reducing latency without requiring a single large energy-consuming system.
Solution Approach 2:
The patent employs quantization and pruning techniques to change the parameters of neural network models, reducing their complexity and size. This allows the models to run on resource-constrained edge devices with lower energy consumption while maintaining acceptable inference accuracy and real-time performance.
2Loss of time
If traditional AI processing systems are deployed in edge devices, then real-time inference capability is improved, but circuit area increases making devices bulky
Solution Approach 1:
The patent divides the AI processing functionality into multiple small distributed units rather than one large centralized processor. This segmentation reduces the circuit area required per device while enabling real-time inference through parallel processing across the distributed network.
Solution Approach 2:
The patent uses replicated lightweight processing units distributed across edge devices, each containing a simplified copy of the neural network model. This copying approach reduces the area requirement compared to deploying a full-precision model on a single device, while maintaining real-time inference capability.
3Measurement precision
If high-precision DACs are used for each local accumulator, then computation precision is improved, but circuit area and power consumption increase
Solution Approach 1:
The patent merges multiple low-precision DACs into a single shared high-precision DAC that serves multiple local accumulators. This merging reduces the total circuit area while maintaining computation precision through the use of a single high-quality reference signal source that is distributed to all accumulators.
Solution Approach 2:
The patent implements a universal reference signal source that serves multiple functions and multiple local accumulators simultaneously. This multi-functional approach reduces redundancy in the circuit design, decreasing area and power consumption while maintaining the precision required for accurate computation.
Data Source
AI summary
Systems and methods of implementing a mixed-signal integrated circuit includes sourcing, by a reference signal source, a plurality of analog reference signals along a shared signal communication path to a plurality of local accumulators; producing an electrical charge, at each of the plurality of local accumulators, based on each of the plurality of analog reference signals; adding or subtracting, by each of the plurality of local accumulators, the electrical charge to an energy storage device of each of the plurality of local accumulators over a predetermined period; summing along the shared communication path the electrical charge from the energy storage device of each of the plurality of local accumulators at an end of the predetermined period; and generating an output based on a sum of the electrical charge from each of the plurality of local accumulators.