Mixed-Function SRAM Structure for FPGA Logic and Routing
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Solution Overview
Problem
In SRAM-based programmable devices, a significant portion of the area remains unoccupied after routing, leading to resource wastage, as only 25% is used for configuration, and the remaining 50% is unused.
Innovation Solution
A programmable device structure with a mixed function storage unit that utilizes SRAM bits to achieve both routing and logic functions through a mixed function unit, which can be configured as a lookup table or multiplexer based on selection control bits, comprising input selection, control selection, and multi-path selection modules with COMS transmission gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If SRAM bits are used only for configuration of register units, then the device structure is simple and easy to manufacture, but a significant portion of the area (50% after routing) remains unoccupied and unused, causing resource wastage
Solution Approach 1:
The patent makes SRAM bits perform multiple functions: they serve as both configuration storage for register units and as programmable logic elements (LUTs) and routing multiplexers. By configuring the same SRAM bits to implement different functions through control signals, the device achieves multi-functionality without adding separate dedicated structures for each function, thereby utilizing the previously idle 50% area effectively
Solution Approach 2:
The patent merges the previously separate functions of configuration storage and logic implementation into a single unified SRAM-based structure. The same physical SRAM bits are used for both purposes by switching their function through control mechanisms, combining what were previously distinct functional blocks into one resource
2Adaptability or versatility
If SRAM bits are dedicated to routing functions, then routing capability is improved, but logic function implementation requires separate resources increasing device complexity
Solution Approach 1:
The SRAM bits are configured to serve dual purposes: when controlled as routing elements, they function as multiplexers for signal routing; when controlled as logic elements, they function as lookup tables for logic operations. This multi-functionality allows a single resource to replace what would traditionally require separate dedicated routing and logic structures
Solution Approach 2:
The patent introduces dynamic reconfigurability where the function of SRAM bits can be changed on-the-fly through control signals. The same physical bits can dynamically switch between serving as routing multiplexers or logic LUTs based on operational requirements, providing adaptability without requiring multiple static structures
Data Source
AI summary
A programmable device structure based on a mixed function storage unit includes a storage unit SRAM and a mixed function unit, wherein the storage unit comprises n register units and at least one selection control bit, wherein n=2{circumflex over ( )}x, and x is natural number; the register units are selected according to the selection control bit; and when the selection control bit selects the mixed function unit to serve as a lookup table, a logic function is achieved; or when the selection control bit selects the mixed function unit to serve as a multiplexer, a routing function is achieved. By multiplexing the register units, the programmable device structure achieves a routing function of a traditional FPGA and also provides a logic function, and the waste of resources is greatly reduced.