Mixed-TFT Display Layout for Low-Power Bending Areas

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Solution Overview

Problem

Current display devices face challenges in achieving low power consumption, which is essential for portable and wearable devices, as they often require high resolution and efficient power management.

Innovation Solution

The use of a display device with a combination of thin film transistors, including those with polycrystalline semiconductor layers for switching transistors and oxide semiconductor layers for drive transistors, along with a specific layout of supply lines and signal links to minimize power consumption and prevent signal line shorting, while simplifying the manufacturing process by forming openings and contact holes through the same process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If display devices use conventional transistor structures and layouts, then manufacturing processes are simpler, but power consumption is high

Engineering Contradiction:
Improvepower consumptionVSAvoidtransistor structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The display device uses different transistor types segmented by function: oxide semiconductor transistors for drive transistors requiring low leakage current, and polycrystalline semiconductor transistors for switching transistors requiring high mobility. This segmentation allows each transistor type to be optimized for its specific function, reducing overall power consumption while managing complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different semiconductor materials are applied locally based on functional requirements: oxide semiconductor layers in drive transistors where low off-state current is critical for power saving, and polycrystalline semiconductor layers in switching transistors where high on-state current and mobility are needed for signal routing. This local quality approach optimizes power consumption without requiring complete redesign of all transistors.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If supply lines are placed close together to reduce area, then device area is smaller, but signal lines may be shorted

Engineering Contradiction:
Improvedevice areaVSAvoidsignal line isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent positions supply lines in different vertical layers (first supply line in first layer, second supply line in second layer) to reduce horizontal spacing requirements. This dimensional separation allows supply lines to be closer in plan view while maintaining adequate isolation through vertical stacking, thus reducing device area without compromising reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

A third supply line is introduced as an intermediary element positioned between the first and second supply lines. This third supply line acts as a spacing element that electrically isolates the high-potential first supply line from the low-potential second supply line, preventing shorting while allowing compact horizontal arrangement of all three lines.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If openings and contact holes are formed through separate processes, then manufacturing precision is higher, but manufacturing complexity increases

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidopening and contact hole alignment
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent designs openings and contact holes to be formed simultaneously through a single etching process using a common mask pattern. This merging of formation steps simplifies the manufacturing process by reducing the number of lithography and etching cycles, while the unified formation method inherently ensures consistent depth and alignment between openings and contact holes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The same mask pattern and etching process are used to form both openings and contact holes, making the process universal for creating different types of through-holes in the substrate. This multi-functional approach reduces manufacturing complexity by eliminating the need for separate specialized processes for openings versus contact holes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11925066B2Display device
Publication Date: 2024.03.05 LG DISPLAY CO LTD
  • US11925066B2 patent drawing
  • US11925066B2 patent drawing
  • US11925066B2 patent drawing

AI summary

Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.