Mixed TFT Substrate Assembly for Simpler Display Manufacturing

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Solution Overview

Problem

Current display manufacturing processes are complicated due to the incompatibility of processes for producing polycrystalline silicon thin film transistors (TFTs) and metal oxide TFTs, making it challenging to create a substrate with both types of transistors.

Innovation Solution

A substrate assembly is designed to include both a polycrystalline silicon TFT and a metal oxide TFT, with the silicon TFT disposed on the peripheral region and the oxide TFT on the display region, ensuring electrical insulation between the two types of transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If both polycrystalline silicon TFT and metal oxide TFT are manufactured using separate incompatible processes, then each transistor type can achieve its desired performance characteristics, but the overall manufacturing process becomes complicated and requires multiple chemical vapor deposition steps

Engineering Contradiction:
Improvetransistor performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the manufacturing processes for polycrystalline silicon TFT and metal oxide TFT into a single integrated process flow. The gate electrode layers, insulating layers, and semiconductor layers are formed using shared deposition and processing steps, eliminating the need for separate incompatible processes while maintaining the performance characteristics of both transistor types.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs universal process steps that serve multiple functions in the fabrication of both transistor types. For example, the same gate electrode deposition process is used for both polycrystalline silicon and metal oxide TFTs, and the same insulating layer formation process serves both transistor structures, thereby simplifying the overall manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple chemical vapor deposition processes are used to manufacture both transistor types, then compatible transistor performance can be achieved, but the manufacturing time and production cycles increase

Engineering Contradiction:
Improvetransistor compatibilityVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a continuous manufacturing process where the fabrication of polycrystalline silicon TFT and metal oxide TFT proceeds through overlapping and integrated stages. The process flows continuously from substrate preparation through gate electrode formation, insulating layer deposition, and semiconductor layer creation without requiring complete process interruption or reconfiguration between transistor types.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent performs preliminary process preparation that enables subsequent manufacturing steps to be executed efficiently for both transistor types. For example, the substrate is pre-treated and initial layers are formed in a way that accommodates both polycrystalline silicon and metal oxide TFT fabrication requirements from the outset, avoiding the need for separate preparation processes.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12253780B2Electronic device comprising substrate assembly including two types of transistors
Publication Date: 2025.03.18 INNOLUX CORP
  • US12253780B2 patent drawing
  • US12253780B2 patent drawing
  • US12253780B2 patent drawing

AI summary

A substrate assembly includes: a substrate; a first transistor disposed on the substrate, wherein the first transistor includes a first semiconductor layer and the first semiconductor layer is a silicon semiconductor layer; and a second transistor disposed on the substrate, wherein the second transistor includes a second semiconductor layer and a drain electrode electrically connected to the second semiconductor layer, and the second semiconductor layer is an oxide semiconductor layer, wherein the first semiconductor layer of the first transistor is electrically insulated from the drain electrode of the second transistor.