Mixed Track Standard Cell Layout for IC Density and Drive Current

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Solution Overview

Problem

Standard cell designs in integrated circuits face limitations in accommodating varying transistor requirements, leading to inefficiencies in gate density and cell drive current, as they typically have fixed heights that restrict effective signal routing and area utilization.

Innovation Solution

A mixed track standard cell structure with varying cell heights determined by specific equations, allowing for multiple row configurations with alternating well regions and conductive traces, enabling more flexible and compact layouts by optimizing cell heights and interconnect lengths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If standard cells have fixed heights to facilitate placement and routing, then ease of manufacture is improved, but adaptability deteriorates

Engineering Contradiction:

Improveplacement and routing processVSAvoidaccommodation of varying transistor requirements

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The standard cell library is segmented into multiple cell heights (e.g., 8-track, 12-track, 16-track cells) rather than using a single fixed height. This segmentation allows the design tool to select appropriate cell heights based on specific transistor requirements, thereby maintaining ease of manufacture through standardized processes while improving adaptability to different design needs.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The standard cell height is made dynamic rather than fixed. The placement and routing tool can dynamically select from multiple predefined cell heights (8-track, 12-track, 16-track) based on the specific requirements of each cell instance, such as transistor size and drive current needs. This dynamic selection resolves the contradiction by maintaining standardized manufacturing processes while adapting to varying design requirements.

Inventive Principle:

Principle #15Dynamics

2Productivity

If standard cell height is reduced to increase gate density, then productivity is improved, but cell drive current capability deteriorates

Engineering Contradiction:

Improvegate densityVSAvoidcell drive current capability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

Different regions of the standard cell library have different cell heights tailored to specific functional requirements. High-density logic cells use smaller heights (e.g., 8-track) to maximize gate density, while cells requiring high drive current use larger heights (e.g., 16-track) to accommodate larger transistors. This local differentiation resolves the contradiction by optimizing each cell's height for its specific purpose rather than using a uniform height for all cells.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The cell height parameter is varied across different standard cell types rather than being fixed. The placement and routing tool can select from multiple height parameters (8-track, 12-track, 16-track) depending on the required gate density and drive current capability. This parameter variation allows simultaneous optimization of both productivity through higher density cells and reliability through adequate drive current capability where needed.

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If multi-row standard cell structures are used to accommodate varying heights, then adaptability is improved, but device complexity deteriorates

Engineering Contradiction:

Improveaccommodation of high gate density and high-drive current applicationsVSAvoidinterconnect length and area requirements

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Standard cells of different heights (8-track, 12-track, 16-track) are merged into a unified placement and routing framework. The tool seamlessly integrates cells of varying heights within the same standard cell row structure, eliminating the need for separate multi-row configurations. This merging approach maintains adaptability to different cell height requirements while reducing device complexity by simplifying the interconnect structure and area utilization.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8698205B2Integrated circuit layout having mixed track standard cell

Publication Date: 2014.04.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An integrated circuit layout having a mixed track standard cell configuration that having a mixed track standard cell configuration that includes first well regions of a predetermined height and second well regions of a predetermined height, the first and second well regions are arranged within a substrate, first conductors and second conductors arranged and extending across regions of corresponding first and second well regions, and a plurality of standard cells in multiple rows. The standard cells include a first substantially equal to standard cell having a first cell height substantially equal to I(X+Y)+X or Y, wherein X is one half the predetermined height of the first well region, Y is one half the predetermined height of the second well region, and I is a positive integer.