Mixed-Voltage NIOF Analysis Using Single-Corner Noise Scaling
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Solution Overview
Problem
Conventional NIOF analysis for integrated circuits with mixed voltage domains requires multiple sets of noise abstracts and voltage tables, leading to expanded library sizes, increased cell load times, and prolonged analysis run times, making it inefficient and cumbersome.
Innovation Solution
A method for NIOF analysis that scales victim and aggressor voltages to a single characterized voltage, using a scaling factor to maintain a relative voltage ratio, allowing for a single run to identify incorrect switching or functional failures, thereby reducing memory requirements and run time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple sets of ViVo tables and noise abstracts are used for different voltage domains, then all worst-case voltage conditions can be addressed, but library size and cell load time are significantly expanded
Solution Approach 1:
The patent transforms the problem from storing multiple complete sets of ViVo tables and noise abstracts for different voltage domains to storing a single set of tables and abstracts characterized at one voltage corner. A scaling factor is applied during analysis to adjust voltages to match the characterized conditions, eliminating the need for multiple voltage-specific library versions and significantly reducing library size while maintaining coverage of all worst-case voltage conditions.
2Reliability
If multiple sets of ViVo tables and noise abstracts are used for different voltage domains, then all worst-case voltage conditions can be addressed, but standard cell load time is significantly expanded
Solution Approach 1:
Instead of loading multiple voltage-specific sets of ViVo tables and noise abstracts, the patent loads a single set characterized at one voltage corner and dynamically scales voltages during analysis using a scaling factor. This approach reduces cell load time by eliminating redundant data loading while maintaining the ability to analyze all worst-case voltage conditions through voltage scaling.
3Reliability
If multiple NIOF analysis runs are performed to test different worst case voltage corners, then comprehensive noise analysis is achieved, but analysis run time is significantly increased
Solution Approach 1:
The patent merges multiple separate NIOF analysis runs into a single integrated analysis. By characterizing noise abstracts at one voltage corner and applying voltage scaling factors during the analysis, the method combines what would otherwise require multiple sequential runs into one comprehensive analysis that covers all worst-case voltage conditions, significantly reducing total analysis time.
Solution Approach 2:
The patent uses voltage scaling factors to dynamically adjust victim and aggressor voltages during a single NIOF analysis run to simulate multiple worst-case voltage corners. This parameter transformation allows one analysis run to cover the scope of multiple runs, reducing analysis time while maintaining comprehensive noise analysis coverage.
4Measurement precision
If characterized libraries at multiple voltage levels are created, then all voltage domains can be accurately modeled, but library size and cell load time are expanded
Solution Approach 1:
The patent achieves accurate multi-voltage domain modeling without creating multiple voltage-specific library versions by using a single characterized library and applying voltage scaling factors during analysis. The scaling factor adjusts victim and aggressor voltages to match the characterized voltage conditions, maintaining modeling accuracy while avoiding the need to store multiple complete library sets.
Data Source
AI summary
A method, system, and computer program product are disclosed for implementing enhanced noise impact on function (NIOF) analysis of an IC design having nets in multiple different variable voltage domains next to each other and modeling all multiple worst-case victim-aggressor voltage configurations in a single run leveraging noise abstracts characterized at a single voltage corner. The NIOF analysis enables accurately identifying incorrect victim switching or functional fails, effectively and efficiently providing design verification and the ability to sign-off an IC design with a single run, and enable modifying an integrated circuit design to fix NIOF failures, and fabricating an integrated circuit.