Microelectronic Assembly With Mixed Wafer Bonding
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Solution Overview
Problem
Existing microelectronic component arrangements face challenges in miniaturization, particularly in 3D MEMS/IC integration for applications like miniaturized tire pressure monitoring systems, where achieving a compact and cost-effective stacked structure with multiple degrees of freedom is difficult due to the requirement for precise wafer/wafer bonding with same dimensions.
Innovation Solution
A microelectronic component assembly is achieved by stacking substrates with different integration degrees, utilizing a combination of wafer/wafer bonding and chip/wafer bonding processes, where substrates with digital, analog, and sensor components are bonded in a hermetically sealed frame, allowing for separate integration and encapsulation, and enabling the use of varying wafer sizes for efficient production.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wafer/wafer bonding is used to stack substrates, then bonding reliability is improved, but manufacturing complexity increases due to the requirement for same wafer sizes and dimensions
Solution Approach 1:
The patent segments the substrate stacking process into two distinct bonding operations: first wafer/wafer bonding for initial substrate pairs with identical dimensions, then chip/wafer bonding for subsequent substrates with different dimensions. This segmentation allows each bonding type to operate under its optimal conditions, maintaining reliability while reducing overall manufacturing complexity.
Solution Approach 2:
The patent applies preliminary action by first bonding substrate pairs with identical dimensions using wafer/wafer bonding before performing chip/wafer bonding on substrates with different dimensions. This preliminary bonding step creates stable intermediate structures that simplify subsequent bonding operations and reduce manufacturing complexity.
2Adaptability or versatility
If substrates with different dimensions are bonded using traditional wafer/wafer bonding, then design flexibility is improved, but manufacturing precision deteriorates due to dimension mismatch
Solution Approach 1:
The patent segments the bonding process into two phases: first bonding substrates with identical dimensions (ensuring high precision), then bonding substrates with different dimensions using chip/wafer bonding (enabling design flexibility). This segmentation allows each phase to optimize for its specific requirement.
Solution Approach 2:
The patent applies local quality by using different bonding methods for different substrate pairs: wafer/wafer bonding for substrates requiring high precision alignment, and chip/wafer bonding for substrates requiring dimensional adaptability. Each bonding location receives the appropriate method based on local requirements.
3Reliability
If additional encapsulation is provided for MEMS components, then component protection is improved, but device complexity increases
Solution Approach 1:
The patent merges the encapsulation function into the bonding frame structure itself. The bonding frame that connects substrates simultaneously serves as the encapsulation structure for MEMS components, eliminating the need for separate encapsulation layers and reducing device complexity while maintaining protection.
Solution Approach 2:
The bonding frame is designed with multi-functionality, serving both as a mechanical connection element for substrate bonding and as an encapsulation structure for protecting MEMS components. This universal structure reduces the total number of components and simplifies the overall device architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a compact, cost-effective microelectronic component arrangement with multiple degrees of freedom, enabling miniaturization while reducing the need for additional encapsulation and allowing for the integration of diverse functionalities like digital, analog, and sensor components within a small lateral area.
Implementation Method 1
utilizing a combination of wafer/wafer bonding and chip/wafer bonding processes
Implementation Method 2
utilizing a combination of wafer/wafer bonding and chip/wafer bonding processes
Implementation Method 3
bonded to the second substrate by means of a hermetically sealed bonding frame, as a result of which an encapsulation is formed
Data Source
Figure 1
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AI summary
The invention relates to a microelectronic component assembly comprising a plurality of substrates, and a corresponding method of production. Said microelectronic component assembly comprising a plurality of substrates has a first substrate (C1), which is designed as a circuit substrate of a first level of integration, a second substrate (C2), which is designed as a circuit substrate of a second level of integration, and a third substrate (C3), which is designed as a MEMS sensor substrate and which is bonded onto the second substrate (C2). The second and the third substrate is bonded onto the first substrate (C1). The first level of integration is substantially higher than the second level of integration.