Mixed Workfunction Metal for Nanosheet Gate Control
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Solution Overview
Problem
The challenge in fabricating field-effect transistors, such as GAA FETs and FinFETs, lies in maintaining gate control and reducing short-channel effects while scaling down device sizes, which often results in damage to surrounding materials during etching processes, particularly when forming p-type and n-type devices with different workfunction metals.
Innovation Solution
A method involving the deposition of a p-type workfunction metal between multiple layers of both p-type and n-type channel stacks, followed by partial removal from the n-type stack to avoid damage, and subsequent full removal from the n-type stack, allowing a second conductive material with a different workfunction to cover both stacks, ensuring improved threshold voltages and reduced component risk during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If etching processes are used to form p-type and n-type devices with different workfunction metals, then device performance and threshold voltages are improved, but surrounding materials are damaged
Solution Approach 1:
The patent segments the workfunction metal deposition process by depositing p-type workfunction metal on both p-type and n-type channel stacks, then selectively removing it from n-type regions. This segmentation allows different workfunction metals to be applied to different device types without direct contamination, improving device performance while preventing damage from aggressive etching processes.
Solution Approach 2:
The patent uses an intermediary approach by first depositing p-type workfunction metal as a temporary layer on both channel stack types, then using this layer as a protective mask during subsequent processing. This intermediary layer prevents direct exposure of surrounding materials to damaging etchants, reducing harm while enabling precise formation of n-type devices.
2Productivity
If device sizes are scaled down to increase functional density, then production efficiency and cost are improved, but gate control and manufacturing precision deteriorate
Solution Approach 1:
The patent applies local quality by providing different workfunction metal configurations to different regions: p-type workfunction metal is retained on p-type channel stacks while being removed from n-type channel stacks. This localized differentiation maintains precise gate control for each device type despite overall device size reduction, enabling continued scaling while preserving manufacturing precision.
Solution Approach 2:
The patent employs preliminary action by depositing the p-type workfunction metal layer on both channel stacks before the final device differentiation step. This preliminary deposition establishes a uniform baseline that can be selectively modified, allowing precise control over the final workfunction metal distribution and maintaining gate control accuracy even as device dimensions are scaled down.
3Manufacturing precision
If workfunction metals are deposited on both p-type and n-type channel stacks, then threshold voltage control is improved, but process complexity increases
Solution Approach 1:
The patent applies inversion logic by depositing p-type workfunction metal on both p-type and n-type channel stacks initially, then removing it from n-type regions. This inverted approach simplifies the deposition process (one universal deposition step rather than two different ones) while still achieving the desired differentiated result, thereby reducing process complexity while maintaining precise threshold voltage control.
Solution Approach 2:
The patent uses universality by employing a single p-type workfunction metal deposition process that serves multiple functions: it provides the actual p-type workfunction for p-type devices and simultaneously serves as a protective mask or placeholder for n-type devices during subsequent processing. This multi-functional approach reduces the number of separate process steps needed, lowering overall process complexity while maintaining precise threshold voltage control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the formation of p-type and n-type channel stacks with improved threshold voltages and minimizes damage during fabrication, effectively addressing the scaling challenges and maintaining gate control in nanostructure devices.
Implementation Method 1
depositing a first conductive material on a first-type channel stack and a second-type channel stack, the first conductive material having a first workfunction
Implementation Method 2
depositing a first conductive material on a first-type channel stack and a second-type channel stack, the first conductive material having a first workfunction
Data Source
AI summary
A method includes depositing a first conductive material on a first-type channel stack and a second-type channel stack, the first conductive material having a first workfunction, the first conductive material being formed between multiple layers of both the first-type channel stack and the second-type channel stack. The method further includes partially removing the first conductive material from the second-type channel stack such that the first conductive material remains between the multiple layers of both the first-type channel stack and the second-type channel stack and fully removing the first conductive material from the second-type channel stack. The method further includes depositing a second conductive material over both the first-type channel stack and the second-type channel stack such that the second conductive material covers both the first-type channel stack and the first conductive material in between the layers of the first-type channel stack, the second conductive material having a second workfunction that is different than the first workfunction.