Mixer-Free Signal Down-Conversion Through Passband Decimation
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Solution Overview
Problem
Existing digital RF receivers face challenges with high-quality digital mixers that introduce phase errors and require high computational resources, limiting their efficiency and increasing costs due to the need for accurate center frequency tone generation during down-conversion and decimation processes.
Innovation Solution
A mixer-free approach for direct signal down-conversion and decimation in digital receivers, utilizing a passband-to-passband decimator/down-converter algorithm that estimates the center frequency and bandwidth of signals to calculate a decimation ratio and channel index, allowing for polyphase decimation and down-conversion without the need for mixers, thereby reducing digital phase noise and improving signal demodulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital mixers are used for down-conversion, then signal down-conversion can be achieved, but phase errors are introduced and computational resources are heavily required
Solution Approach 1:
The patent extracts and removes the digital mixer component from the down-conversion process. Instead of using a digital mixer to multiply the input signal with a center frequency tone, the invention directly decimates the passband signal by selecting every L-th sample, thereby eliminating the source of phase errors and computational complexity associated with digital mixing while preserving the essential down-conversion function.
Solution Approach 2:
The patent substitutes the mechanical multiplication operation of digital mixers with a simpler sampling operation. Rather than performing complex complex multiplication in the digital domain, the system directly samples the passband signal at a reduced rate, replacing a computationally intensive mechanical process with a simpler digital sampling approach that achieves the same frequency down-conversion effect.
2Measurement precision
If high-quality digital mixers are used, then accurate down-conversion is achieved, but cost and computational resources increase
Solution Approach 1:
The patent replaces expensive, high-precision digital mixers with a simpler, lower-cost decimation approach. By directly sampling every L-th sample of the passband signal without requiring complex mixing operations, the system achieves adequate down-conversion accuracy using computationally inexpensive operations, effectively using a simpler 'disposable' method instead of maintaining expensive precision hardware.
Solution Approach 2:
The patent applies partial action by performing only the essential decimation operation without the full mixing process. Instead of completing the entire mixing operation with all its computational steps, the system performs just the necessary sampling at reduced rate, achieving sufficient down-conversion accuracy with less computational effort than full digital mixing would require.
3Ease of operation
If center frequency tone generation is performed, then down-conversion can be achieved, but phase noise is enhanced
Solution Approach 1:
The patent extracts and removes the center frequency tone generation process from the system. By eliminating the digital mixer that requires generating and multiplying with a center frequency tone, the invention removes the source of phase noise enhancement while retaining the down-conversion capability through direct passband decimation of the sampled signal.
Data Source
AI summary
Systems and methods for direct signal down-conversion and decimation in a digital receiver. The digital receiver produces a decimated passband version of the signal without the problems associated with use of digital mixers. The digital receiver includes a passband-to-passband decimator/down-converter that implements an algorithm which takes the signal band (frequency and bandwidth or lower and upper frequencies) where a signal is present and produces a decimation rate and phase for use by a low-pass mixer-free down-conversion. The digital receiver technology may be efficiently implemented on a digital signal processor or field-programmable gate array.