Mixing DAC Circuit Using Complementary Digital Phase Signals
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Solution Overview
Problem
Conventional mixing digital-to-analog converters (DACs) face complexity and increased silicon area due to local oscillator placement and timing mismatches, which complicate digital-to-analog conversion and frequency transposition, leading to performance errors.
Innovation Solution
The proposed electronic device generates two digital signals from a single input signal with a 180° phase offset, allowing frequency transposition in the digital domain without a local oscillator or additional calibration circuits, using acquisition and processing stages with digital-to-analog converters to produce an analog output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a local oscillator is added to generate transposition signal in conventional mixing DAC, then frequency transposition capability is improved, but device complexity and silicon area increase
Solution Approach 1:
The patent merges the digital-to-analog conversion function and frequency transposition function into a single integrated device. The mixing DAC simultaneously performs DAC conversion and frequency transposition by using the same digital input signal for both functions, eliminating the need for separate local oscillator circuits and reducing overall device complexity.
Solution Approach 2:
The mixing DAC is designed as a multi-functional device that can perform both digital-to-analog conversion and frequency transposition using a single structure. The device accepts a digital input signal and produces both the converted analog signal and the frequency-transposed analog signal, making it universally applicable for both functions without requiring additional dedicated components.
2Adaptability or versatility
If local oscillator and transposition signal distribution are added to conventional mixing DAC, then frequency transposition is enabled, but silicon area and power consumption increase
Solution Approach 1:
The patent combines the frequency transposition operation with the digital-to-analog conversion process by performing transposition in the digital domain before conversion. This approach eliminates the need for separate local oscillator circuits and signal distribution networks, thereby reducing the silicon area required for implementing frequency transposition functionality.
3Measurement precision
If additional processing circuit is added to calibrate timing mismatches in mixing DAC, then timing accuracy is improved, but device complexity and silicon area increase
Solution Approach 1:
The patent performs frequency transposition in the digital domain before digital-to-analog conversion, which allows timing relationships to be established in advance with high precision using digital logic. This preliminary digital processing eliminates timing mismatches before they occur in the analog domain, removing the need for additional calibration circuits.
4Adaptability or versatility
If N processing cells are used to generate mixed analog signals in conventional mixing DAC, then frequency transposition is achieved, but timing mismatches between signals occur
Solution Approach 1:
The patent performs all frequency transposition operations in the digital domain before conversion to analog signals. By completing the transposition process digitally with precise timing control, the patent ensures that all resulting analog signals are inherently synchronized, eliminating timing mismatch issues that would otherwise require additional calibration circuitry.
Data Source
AI summary
An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.


