ML-Bilateral Hybrid Kernel Circuit for CPU-Efficient Noise Reduction

Solution Overview

Problem

Existing image processing algorithms executed on central processing units (CPUs) consume significant bandwidth and increase power consumption, necessitating the development of hardware-based image processing pipelines that can efficiently perform noise reduction without overburdening CPU resources.

Innovation Solution

An image processing circuit that incorporates a hybrid kernel calculation circuit and a noise filtering circuit, generating a hybrid kernel by combining machine learning (ML) and bilateral kernels to perform noise reduction on image data, thereby reducing noise through a hybrid kernel for each pixel.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If image processing algorithms are executed on CPU, then image processing can be performed, but CPU bandwidth and power consumption increase significantly

Engineering Contradiction:

Improveimage processing capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces CPU-based software execution with a dedicated hardware image processing circuit. This hardware circuit includes specialized components such as a hybrid kernel calculation circuit that combines ML kernels and bilateral kernels, and a noise filtering circuit that applies these kernels to reduce noise. By substituting the general-purpose CPU with a dedicated hardware pipeline, the system achieves high-speed image processing without consuming CPU bandwidth or increasing power consumption significantly.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The image processing pipeline is segmented into dedicated hardware modules: a hybrid kernel calculation circuit for computing noise reduction kernels, and a noise filtering circuit for applying these kernels to image data. This segmentation allows each module to be optimized independently for its specific function, improving overall processing efficiency and eliminating the need to share CPU resources.

Inventive Principle:

Principle #1Segmentation

2Productivity

If image processing algorithms are executed on CPU, then image processing can be performed, but CPU resources become overloaded

Engineering Contradiction:

Improveimage processing capabilityVSAvoidCPU resource consumption

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces CPU-based software execution with a dedicated hardware image processing circuit. This hardware circuit includes specialized components such as a hybrid kernel calculation circuit that combines ML kernels and bilateral kernels, and a noise filtering circuit that applies these kernels to reduce noise. By substituting the general-purpose CPU with a dedicated hardware pipeline, the system achieves high-speed image processing without consuming CPU bandwidth or increasing power consumption significantly.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces an intermediary hardware image processing circuit between the image sensor and subsequent processing stages. This intermediary circuit handles all noise reduction operations independently, preventing image processing tasks from interfering with CPU operations. The hybrid kernel calculation circuit and noise filtering circuit work as an isolated pipeline, mediating the image processing function away from CPU resources.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If traditional noise reduction methods are used, then noise can be reduced, but processing speed and efficiency are limited by CPU performance

Engineering Contradiction:

Improvenoise reduction qualityVSAvoidprocessing speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent replaces CPU-based software execution with a dedicated hardware image processing circuit. This hardware circuit includes specialized components such as a hybrid kernel calculation circuit that combines ML kernels and bilateral kernels, and a noise filtering circuit that applies these kernels to reduce noise. By substituting the general-purpose CPU with a dedicated hardware pipeline, the system achieves high-speed image processing without consuming CPU bandwidth or increasing power consumption significantly.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements dynamic kernel combination where the hybrid kernel calculation circuit adaptsively combines ML kernels and bilateral kernels based on image characteristics. The system dynamically adjusts the processing approach by selecting appropriate kernel combinations for different image regions and noise conditions, optimizing both noise reduction quality and processing speed in real-time.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS12462346B2Machine learning based noise reduction circuit

Publication Date: 2025.11.04 APPLE INC

AI summary

Embodiments relate to an image processing circuit that performs machine learning (ML) based noise reduction on image data. The image processing circuit includes a ML based noise reduction circuit that includes a hybrid kernel calculation circuit and a noise filtering circuit coupled to the hybrid kernel calculation circuit. The hybrid kernel calculation circuit generates, for each pixel of an image, a hybrid kernel by combining a ML kernel of each pixel of the image and a bilateral kernel of each pixel of the image. The noise filtering circuit performs, for each pixel of the image, noise filtering of the image using the hybrid kernel for each pixel of the image to generate a de-noised version of the image.