ML ECC Controller for NAND Flash Speed-Reliability Tradeoff
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Solution Overview
Problem
Error-correcting codes (ECC) used in universal flash storage (UFS) and solid-state drives (SSD) are mismatched for flash memory controllers with NAND flash memory, lacking dynamic random-access memory (DRAM), leading to inefficiencies in error detection and correction.
Innovation Solution
A memory controller incorporating a hard-decision (HD) ECC decoder, a soft-decision (SD) ECC decoder, and a machine-learning equalizer (MLE) that selects between them based on a learned cost function for optimal data word decoding and noise cancellation, optimized for NAND-Flash memories using a combination of soft Hamming permutation code (SHPC) decoding and machine-learning equalization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If hard-decision (HD) ECC decoding is used, then decoding speed is improved, but decoding reliability deteriorates
Solution Approach 1:
The system dynamically selects between HD and SD ECC decoding methods based on real-time channel conditions and error patterns. The controller adapts the decoding approach by evaluating syndrome results and error counts, switching from fast HD decoding under good conditions to more reliable SD decoding when errors exceed thresholds, thus optimizing both speed and reliability according to actual operational context.
2Reliability
If soft-decision (SD) ECC decoding is used, then decoding reliability is improved, but decoding speed deteriorates
Solution Approach 1:
The system applies SD ECC decoding selectively rather than universally. It performs HD decoding first as a partial solution for most cases, and only invokes the more computationally intensive SD decoding when HD decoding fails to correct errors within acceptable thresholds. This partial application of SD decoding maintains reliability for critical cases while avoiding the speed penalty for routine operations.
3Reliability
If machine-learning equalization is applied, then noise cancellation performance is improved, but computational complexity increases
Solution Approach 1:
The machine-learning equalizer performs preliminary noise cancellation and signal conditioning before data is passed to the ECC decoders. By pre-processing the received signal to reduce noise and interference upfront, the system improves subsequent decoding performance for both HD and SD methods while managing computational complexity through early intervention rather than repeated processing during decoding stages.
Data Source
AI summary
A machine-learning (ML) error-correcting code (ECC) controller may include a hard-decision (HD) ECC decoder optimized for high-speed data throughput, a soft-decision (SD) ECC decoder optimized for high-correctability data throughput, and a machine-learning equalizer (MLE) configured to variably select one of the HD ECC decoder or the SD ECC decoder for data throughput. An embodiment of the ML ECC controller may provide speed-optimized HD throughput based on a linear ECC. The linear ECC may be a soft Hamming permutation code (SHPC).