Machine Learning Layout Correction for Semiconductor Process Deviations
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Solution Overview
Problem
As semiconductor integration increases and processes are miniaturized, correcting layout deviations in semiconductor fabrication becomes increasingly difficult due to the complexity of highly integrated devices, making it challenging to efficiently compensate for process deviations in etching and other semiconductor processes.
Innovation Solution
The use of machine learning methods to determine vertical and horizontal features affecting semiconductor patterns, training a machine learning module to correct design layouts based on these features, and generating input channels for inference to automatically adjust layouts and improve process pattern formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor integration increases and processes are miniaturized, then device integration and space utilization are improved, but layout correction difficulty increases
Solution Approach 1:
The patent replaces manual layout correction methods with an automated machine learning-based system. The machine learning model automatically analyzes process deviations, identifies affected layout patterns, and generates corrected layouts, eliminating the need for manual intervention in correcting highly integrated device layouts.
Solution Approach 2:
The system enables self-service layout correction by automatically detecting process deviations, determining affected patterns, and generating corrections without requiring human expertise. The machine learning model continuously learns from process data to improve its correction accuracy autonomously.
2Manufacturing precision
If manual layout modification is used to compensate for process deviations, then process deviation correction is achieved, but design time and cost increase
Solution Approach 1:
The patent replaces time-consuming manual layout modification with automated machine learning-based correction. The system processes layout files, identifies deviations, and generates corrected layouts automatically, reducing design time from days to minutes while maintaining high precision in process deviation compensation.
3Manufacturing precision
If conventional layout correction methods are used, then process deviations can be addressed, but the complexity of highly integrated devices makes efficient compensation difficult
Solution Approach 1:
The patent replaces conventional manual correction methods with an automated machine learning system that efficiently handles highly integrated devices. The model processes complex layout files, identifies affected patterns across multiple layers, and generates corrections rapidly, achieving both high precision and efficiency in compensation.
Solution Approach 2:
The system creates a digital copy of the layout file and processes corrections on the copy rather than directly modifying the original. This allows iterative refinement and validation of corrections before final implementation, improving both precision and efficiency in handling complex integrated devices.
Data Source
AI summary
With respect to each layout pattern of a plurality of layout patterns included in a layout for semiconductor processes, where the layout includes schematic information to form process patterns of a semiconductor device, vertical features indicating an effect of a lower structure on the process patterns are determined, and the lower structure indicates a structure that is formed in the semiconductor device before the process patterns are formed. A machine learning module is trained based on a training layout and the vertical features of the training layout. A design layout with schematic information to form target process patterns is corrected based on the trained machine learning module, the design layout and the vertical features of the design layout. Reliability and integration of the layout for the semiconductor processes may be increased by correcting the layout based on the vertical features and the horizontal features.