ML-Based Macro Area Prediction for IC Physical Synthesis
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Solution Overview
Problem
Current methods for designing integrated circuits face challenges in accurately determining the size and placement of new macros, which are resource-intensive and prone to human errors, especially when considering macro-specific features and connectivity, leading to inefficient and inaccurate macro design.
Innovation Solution
A computer-implemented method using machine learning, specifically pre-trained models like artificial neural networks, to dynamically predict the required physical area and aspect ratio of new macros based on logic synthesis and bill of materials, automating the extraction of features and synthesis process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual methods are used to determine macro size and placement, then design flexibility is maintained, but accuracy and efficiency deteriorate due to human errors and resource intensity
Solution Approach 1:
The patent replaces manual mechanical design processes with an automated machine learning system. The ML model automatically predicts macro specifications (area, aspect ratio) based on logic synthesis inputs, eliminating manual calculation and measurement while improving both accuracy and efficiency.
Solution Approach 2:
The system enables self-service automation where the ML model independently performs macro size prediction and provides recommendations without human intervention. The physical synthesis tool then automatically incorporates these predictions into the floorplan optimization process.
2Adaptability or versatility
If fixed macro outlines are used during floorplan optimization, then placement simplicity is maintained, but adaptability deteriorates as macro dimensions cannot be adjusted
Solution Approach 1:
The patent introduces dynamic adaptability by allowing macro dimensions to be adjusted during floorplan optimization. The ML model predicts appropriate macro area and aspect ratio based on specific design requirements, enabling the physical synthesis tool to dynamically adjust macro outlines rather than using fixed dimensions.
Solution Approach 2:
The system changes macro parameters (area, aspect ratio) based on predictions from the ML model. The physical synthesis tool receives predicted specifications and adjusts macro dimensions accordingly, allowing flexible adaptation to different design scenarios while maintaining process manageability.
3Measurement precision
If detailed feature extraction is performed for each macro, then prediction accuracy is improved, but computational resource consumption increases
Solution Approach 1:
The patent applies partial action by extracting only the most relevant features needed for accurate macro prediction rather than analyzing all possible macro characteristics. The ML model is trained to identify and process key features from logic synthesis outputs, achieving high prediction accuracy with reduced computational overhead.
Data Source
AI summary
A computer-implemented method includes receiving, by a processor, a physical design block and a physical hierarchy of a chip design of a chip. Further, the method includes extracting, by the processor, one or more features of a macro to be added to the chip design based on a logic synthesis of the chip design. Further, the method includes predicting, by the processor, specifications of the macro to be added to the chip design based on the physical design block, the predicting performed using a pre-trained machine learning model. Further, the method includes using, by the processor, the specifications of the macro to perform a physical synthesis of the chip design to determine a physical layout of the chip.