ML-Based Memory Prefetching for Irregular Access Patterns
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Solution Overview
Problem
Existing data prefetching techniques are limited by their reliance on regular memory access patterns and are not effective in predicting future accesses for complex or irregular patterns, leading to inefficiencies in memory operations.
Innovation Solution
A method that identifies sequences of m+1 memory addresses, converts them into relative addresses, and uses a trained machine learning model to predict p relative addresses for proactive data prefetching, allowing for more accurate prediction of future memory accesses and improving system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional prefetching techniques are used based on regular memory access patterns, then implementation is simple, but prediction accuracy is limited for complex or irregular patterns
Solution Approach 1:
The patent replaces traditional mechanical/deterministic prefetching algorithms with a machine learning-based cognitive system. Specifically, it uses neural networks or other ML models to predict memory access patterns, substituting rigid rule-based mechanisms with adaptive intelligent systems that can learn complex patterns without explicit programming.
Solution Approach 2:
The patent transforms the problem by changing parameters from absolute memory addresses to relative addresses (differences between consecutive addresses). This parameter transformation simplifies the input data structure and enables the machine learning model to generalize better across different memory access scenarios, improving prediction accuracy while managing complexity.
2Loss of time
If more memory access patterns are monitored to improve prediction accuracy, then latency reduction improves, but system complexity increases
Solution Approach 1:
The patent extracts only the essential feature needed for prediction - the relative address differences - from the complete memory access information. By taking out only the critical parameter (relative address) rather than monitoring and processing all possible memory access attributes, the system reduces complexity while maintaining prediction capability.
Solution Approach 2:
The patent performs preliminary computation of relative addresses from monitored memory accesses, preparing processed data in advance for the machine learning model. This preliminary transformation of raw address data into relative differences occurs continuously in the background, enabling the ML model to receive pre-processed input that requires less complex real-time analysis.
3Adaptability or versatility
If conventional prefetching methods limited to consecutive or constant-distance addresses are used, then implementation is straightforward, but applicability to real-world workloads is limited
Solution Approach 1:
The patent creates a universal prefetching solution using machine learning that can handle multiple types of memory access patterns simultaneously - sequential, random, strided, and irregular patterns all fall under the same ML-based framework. The single machine learning model serves multiple functions by adapting to different access patterns without requiring separate specialized algorithms for each case.
Solution Approach 2:
The patent replaces multiple specialized mechanical prefetching algorithms (each designed for specific patterns like sequential or strided access) with a single cognitive machine learning system that automatically adapts to any pattern type, greatly enhancing versatility while the relative address transformation maintains implementation feasibility.
Data Source
AI summary
A method of prefetching data is provided including monitoring sequences of memory addresses of data being accessed by a system, whereby sequences of m+1 memory addresses each are continually identified; and for each identified sequence: converting, upon identifying said each sequence, memory addresses of said each sequence into m relative addresses, whereby each of the m relative addresses is relative to a previous memory address in said each sequence, so as to obtain an auxiliary sequence of m relative addresses; upon converting said memory addresses, feeding said auxiliary sequence of m relative addresses as input to a trained machine learning model for it to predict p relative addresses of next memory accesses by the system, where p≥1; and prefetching data at memory locations associated with one or more memory addresses that respectively correspond to one or more of the p relative addresses predicted.