Hardware-Aware ML Pipeline Deployment Across Heterogeneous Chipsets
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Solution Overview
Problem
Existing development platforms do not provide an efficient way for engineers to easily and quickly develop machine learning pipelines on edge devices with different hardware compute elements, requiring significant coding and a steep learning curve to understand proprietary hardware details.
Innovation Solution
A vision development platform (VDP) that allows users to build machine learning pipelines using a graphical user interface (GUI) without extensive coding, synthesizing hardware-agnostic functional descriptions into executable components for various hardware compute elements, including a synthesis engine that maps functional modules to appropriate hardware compute elements and generates implementation packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If engineers use existing development platforms to develop machine learning pipelines on edge devices with proprietary hardware, then the pipelines can be deployed on specific hardware, but the development process becomes complex and time-consuming due to the need to understand and code for hardware-specific details
Solution Approach 1:
The patent introduces a hardware-agnostic functional description format as an intermediary layer between the engineer's high-level pipeline design and the hardware-specific implementation. This functional description serves as a mediator that translates hardware-agnostic operations into hardware-specific instructions through automatic code generation, eliminating the need for engineers to directly code for proprietary hardware details while maintaining hardware optimization
Solution Approach 2:
The patent replaces the manual mechanical process of writing hardware-specific code with an automated code generation system. Instead of engineers manually coding pipeline components for specific hardware architectures, the system automatically generates optimized hardware-specific code from high-level functional descriptions, significantly reducing development complexity and time
2Productivity
If engineers manually code machine learning pipelines for specific hardware platforms, then the pipelines can be optimized for hardware performance, but the development time increases significantly
Solution Approach 1:
The patent performs preliminary actions by pre-defining hardware-agnostic functional descriptions and their corresponding hardware-specific implementations in advance. Engineers can directly use these pre-prepared functional modules in their pipelines without needing to understand or re-implement the underlying hardware-specific code, dramatically reducing development time while maintaining optimization
Solution Approach 2:
The patent substitutes manual coding with automated code generation, replacing the time-consuming mechanical process of writing hardware-specific code with an automated system that generates optimized code instantly from high-level functional descriptions, thereby increasing development productivity
3Adaptability or versatility
If engineers study proprietary hardware details to develop pipelines, then the pipelines can be efficiently deployed on the hardware, but the learning curve becomes steep and difficult to master
Solution Approach 1:
The patent creates a universal hardware-agnostic functional description format that can be used across different hardware platforms. This universal interface allows engineers to write pipeline code once that can be deployed on multiple hardware types without needing to learn each platform's specific details, making the system adaptable to various hardware while keeping the learning curve shallow
Solution Approach 2:
The hardware-agnostic functional description acts as an intermediary layer that shields engineers from hardware-specific complexities. Engineers interact only with the high-level functional interface, while the system automatically handles the hardware-specific details, eliminating the need to study proprietary hardware architecture while maintaining full hardware adaptability
Data Source
AI summary
A method or system for implementing a machine learning pipeline on a chipset comprising a plurality of hardware compute elements. The system accesses a hardware-agnostic functional description of the machine learning pipeline, wherein the description specifies a plurality of functional modules, including at least one machine learning model. Hardware specifications of the chipset are accessed to identify the available hardware compute elements. Based on the hardware specifications, the functional modules are synthesized into a plurality of interconnected executable components configured to execute on at least two different hardware compute elements. An implementation package is generated, comprising the executable components and metadata describing interconnections between them. The implementation package is then deployed to the chipset, where the executable components are executed by the identified hardware compute elements.