Machine Learning Process Proximity Correction for Semiconductor Layouts

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Solution Overview

Problem

The increasing complexity of semiconductor device manufacturing due to high integration and nano-scale technology leads to significant process errors during etching, requiring extensive computation for layout revisions, which is inefficient and unreliable.

Innovation Solution

An electronic device employing machine learning-based process proximity correction, which generates and adjusts layouts by measuring biases, critical dimensions, and mis-alignments, using a process proximity correction module to reduce computation and enhance reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If machine learning-based process proximity correction is used to generate layouts, then reliability is improved, but computational complexity increases

Engineering Contradiction:
Improvelayout generation reliabilityVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs preliminary learning by storing corrected layout patterns and their corresponding process parameters in advance. When generating new layouts, it retrieves and applies pre-learned correction rules, avoiding the need for complex real-time computations while maintaining high reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system creates simplified copies of complex correction patterns by storing representative examples of layout corrections in a database. These copied patterns are then reused for similar situations, reducing computational burden while preserving the reliability benefits of machine learning-based correction.

Inventive Principle:
Principle #26Copying

2Manufacturing precision

If extensive computation is performed for layout revisions to compensate for process errors, then manufacturing precision is improved, but productivity decreases

Engineering Contradiction:
Improvelayout accuracyVSAvoidlayout generation speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

Correction rules and parameters are pre-computed and stored during a learning phase using actual process data. During production, the system applies these pre-computed rules directly to layouts, achieving high precision without the need for extensive real-time computation, thus maintaining productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system transforms complex layout correction problems into simplified parameter adjustments by learning the relationship between layout features and correction parameters. This allows rapid adjustment of layout parameters based on pre-learned models, achieving high precision efficiently.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If traditional optical proximity correction is used, then computational requirements are reduced, but reliability and accuracy decrease

Engineering Contradiction:
Improvecomputation efficiencyVSAvoidlayout correction reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary learning using actual process data to build accurate correction models. These pre-learned models capture complex process variations that traditional OPC methods miss, enabling reliable corrections with reduced computational requirements during production.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from actual process measurements (ACI layouts) to continuously improve correction accuracy. By comparing predicted versus actual outcomes and adjusting the learning model accordingly, the system achieves high reliability while maintaining computational efficiency through iterative refinement rather than exhaustive computation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11900043B2Electronic device for manufacturing semiconductor device and operating method of electronic device
Publication Date: 2024.02.13 SAMSUNG ELECTRONICS CO LTD
  • US11900043B2 patent drawing
  • US11900043B2 patent drawing
  • US11900043B2 patent drawing

AI summary

Disclosed is an operating method of an electronic device which includes receiving a design layout for manufacturing the semiconductor device, generating a first layout by performing machine learning-based process proximity correction (PPC), generating a second layout by performing optical proximity correction (OPC), and outputting the second layout for a semiconductor process. The generating of the first layout includes generating a first after cleaning inspection (ACI) layout by executing a machine learning-based process proximity correction module on the design layout, generating a second after cleaning inspection layout by adjusting the design layout based on a difference of the first after cleaning inspection layout and the design layout and executing the process proximity correction module on the adjusted layout, and outputting the adjusted layout as the first layout, when a difference between the second after cleaning inspection layout and the design layout is smaller than or equal to a threshold value.