ML-Based Test Case Selection for IC Timing Analysis

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Solution Overview

Problem

The process of testing integrated circuit designs using electronic design automation (EDA) tools is resource-intensive due to the need to evaluate an infinite number of combinations of fabrication and operating environment parameters, making it inefficient to select and test all possible test cases.

Innovation Solution

The method involves generating an embedding data set from a plurality of test cases, clustering them based on a clustering model, and selecting critical test cases corresponding to the centroids of these clusters for timing analysis, thereby reducing the number of test cases needed to efficiently validate integrated circuit designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all possible test cases representing extremes in fabrication parameters and operating environment parameters are selected for testing, then the reliability of integrated circuit design validation is improved, but the resource consumption and time required for the testing process increases significantly

Engineering Contradiction:
Improvereliability of integrated circuit design validationVSAvoidtime required for testing process
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and removes redundant test cases from the complete set of bounding test cases. By using machine learning models to identify and eliminate test cases that provide minimal additional validation value, the system retains only the most critical test cases, thereby reducing testing time while preserving validation reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transforms the test case selection process by changing parameters from exhaustive coverage to intelligent sampling. Machine learning models analyze test case characteristics and select a subset that optimizes the balance between validation thoroughness and testing efficiency, reducing time consumption while maintaining reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If all possible test cases representing extremes in fabrication parameters and operating environment parameters are selected for testing, then the reliability of integrated circuit design validation is improved, but the computing resources required for the testing process increases significantly

Engineering Contradiction:
Improvereliability of integrated circuit design validationVSAvoidcomputing resources required for testing process
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes redundant test cases from the complete set of bounding test cases. By using machine learning models to identify and eliminate test cases that provide minimal additional validation value, the system retains only the most critical test cases, thereby reducing computing resource consumption while preserving validation reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by testing only a carefully selected subset of test cases rather than the complete set. The machine learning model determines the optimal subset size and composition, performing just enough testing to ensure reliability without the excessive resource consumption of exhaustive testing.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If a large number of test cases are selected for testing integrated circuit designs, then the comprehensiveness of validation is improved, but the efficiency of the testing process deteriorates

Engineering Contradiction:
Improvecomprehensiveness of validationVSAvoidefficiency of testing process
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent transforms the test case selection approach by changing from comprehensive coverage parameter to optimized subset parameter. Machine learning models analyze and select test cases that maximize validation comprehensiveness per unit of testing effort, thereby improving testing efficiency while maintaining validation thoroughness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical approach of systematically testing all test cases with an intelligent system based on machine learning. The ML models predict which test cases provide the most value, substituting brute-force comprehensive testing with smart selective testing, thereby improving efficiency without sacrificing comprehensiveness.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11928411B2Machine learning-based integrated circuit test case selection for timing analysis
Publication Date: 2024.03.12 QUALCOMM INC
  • US11928411B2 patent drawing
  • US11928411B2 patent drawing
  • US11928411B2 patent drawing

AI summary

Certain aspects of the present disclosure provide techniques for testing integrated circuit designs based on test cases selected using machine learning models. An example method generally includes receiving a plurality of test cases for an integrated circuit. An embedding data set is generated from the plurality of test cases. A respective embedding for a respective test case of the plurality of test cases generally includes a mapping of the respective test case into a multidimensional space. A plurality of test case clusters is generated based on a clustering model and the embedding data set. A plurality of critical test cases for testing the integrated circuit is selected based on the plurality of test case clusters. The integrated circuit is timed based on the plurality of critical test cases and a hard macro defining the integrated circuit.