Machine Learning Verification Engine Orchestration
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Solution Overview
Problem
Current semiconductor circuit design verification tools face challenges in efficiently selecting and scheduling verification engines due to the lack of a universally superior algorithm, leading to suboptimal performance and reliance on ad-hoc heuristics and trial-and-error methods.
Innovation Solution
A computer-implemented method using machine learning to analyze design descriptions, extract feature data, and orchestrate verification engines by selecting between falsification and prove engines based on predicted problem types, leveraging directed-acyclic graphs and statistical data from SAT solvers to optimize engine selection and scheduling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple verification engines with different algorithms are used to verify semiconductor designs, then verification completeness and reliability are improved, but verification time and computational resources increase due to the need to orchestrate and schedule multiple engines
Solution Approach 1:
The patent implements dynamic engine selection and scheduling based on real-time analysis of design features and problem characteristics. The verification system adaptively chooses which engines to run and in what order, rather than using a fixed static schedule. This dynamic approach allows the system to optimize verification time for each specific design while maintaining comprehensive coverage through multiple engines.
Solution Approach 2:
The verification system performs self-orchestration by automatically analyzing design features and selecting appropriate verification engines without external intervention. The system extracts features from the design description, compares them against stored problem profiles, and autonomously determines the optimal engine scheduling strategy, eliminating the need for manual configuration or external control.
2Ease of manufacture
If ad-hoc heuristics and trial-and-error methods are used to orchestrate verification engines, then ease of implementation is improved, but verification efficiency and productivity deteriorate due to reliance on engineer experience and luck
Solution Approach 1:
The patent replaces manual ad-hoc orchestration methods with an automated machine learning-based system. Instead of relying on engineer experience and trial-and-error, the system uses feature extraction, profile matching, and algorithmic decision-making to orchestrate verification engines. This substitution of mechanical/manual processes with automated intelligent systems dramatically improves verification efficiency while maintaining ease of implementation through automated workflows.
Solution Approach 2:
The system implements feedback loops where verification results and performance data are continuously analyzed to refine engine selection and scheduling strategies. The system learns from past verification outcomes and adjusts its orchestration decisions accordingly, improving productivity over time while maintaining ease of operation through automated feedback-driven optimization.
3Ease of operation
If static engine scheduling is used where engines are run in a fixed order, then device complexity is reduced and ease of operation is improved, but verification productivity deteriorates because the schedule cannot adapt to different design characteristics
Solution Approach 1:
The patent transforms static engine scheduling into a dynamic adaptive system. The verification orchestration automatically adjusts engine selection and scheduling based on analyzed design features and matched problem profiles. This dynamic approach maintains ease of operation through automated decision-making while dramatically improving productivity by optimizing the verification process for each specific design characteristics.
Solution Approach 2:
The system changes operational parameters of the verification process based on design characteristics. By extracting features from design descriptions and matching them against stored profiles, the system dynamically adjusts which verification engines are activated and in what order, rather than using a fixed parameter set. This parameter adaptation improves productivity while maintaining ease of operation through automated parameter selection.
Data Source
AI summary
A design verification problem includes a design description and a property to be verified. Feature data is identified from the design verification problem and a result is predicted for the design verification problem based on the feature data. A plurality of verification engines is then orchestrated based on the prediction. Supervised machine learning may be used for the result prediction. Feature data and verification results from a plurality of training test cases are used to train a classifier to create a prediction model. The prediction model uses the feature data of the design verification problem to make a result prediction for the design verification model.


