Memory Controller Direct MLC Write Bypassing SLC Buffer

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Solution Overview

Problem

Traditional memory controllers for MLC flash memories increase workload by temporarily writing data into SLC memory blocks, leading to storage space inefficiency and performance issues due to the limited number of MLC blocks available.

Innovation Solution

A method where a controller temporarily stores data in volatile memory and dynamically determines whether to directly write it into an MLC memory block, bypassing the need to first write to an SLC block, thereby optimizing storage space and reducing the time spent on data transfer and block erasure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is temporarily written into SLC memory blocks before collecting to MLC memory blocks, then data can be written into MLC memory blocks, but the storage space of SLC memory blocks runs out quickly and the workload of the memory controller is greatly increased

Engineering Contradiction:
Improvedata writing capabilityVSAvoidmemory controller workload
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the intermediate SLC memory block step from the data writing process. Instead of writing data to SLC blocks first and then collecting to MLC blocks, the system directly writes data from the host interface to MLC memory blocks, eliminating the need for SLC buffer blocks and reducing controller workload.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the MLC memory blocks serve dual functions: they act as both the final storage destination and the intermediate buffer for incoming data. This eliminates the need for separate SLC buffer blocks, as MLC blocks can directly receive and store data from the host device.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If a portion of physical blocks in MLC flash memory is configured as SLC memory blocks, then data can be received and temporarily stored, but the amount of physical blocks available as MLC memory blocks is reduced

Engineering Contradiction:
Improvedata reception capabilityVSAvoidavailable MLC blocks
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent makes MLC memory blocks universal by enabling them to directly perform both buffer and storage functions. The MLC blocks can directly receive data from the host interface and store it without requiring separate SLC blocks, thus maximizing the quantity of blocks available for MLC operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the data writing process into direct host-to-MLC transfers rather than using a two-stage SLC-to-MLC process. This segmentation eliminates the need to reserve portions of physical blocks as SLC blocks, allowing all blocks to be configured as MLC blocks.

Inventive Principle:
Principle #1Segmentation

3Reliability

If data is temporarily written into SLC memory blocks first, then collected to MLC memory blocks, then the time required for writing and erasing SLC blocks is increased

Engineering Contradiction:
Improvedata storage capabilityVSAvoidwriting and erasing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent removes the SLC block writing and erasing steps from the data storage process. By directly writing to MLC blocks, the system eliminates the time-consuming intermediate transfer and the subsequent erasure of SLC blocks, reducing total operation time.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs data validation and preparation in the controller's volatile memory before initiating the direct write to MLC blocks. This preliminary action ensures data readiness, allowing direct writing without requiring preliminary writes to SLC blocks followed by transfers to MLC.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9514042B2Method for managing memory apparatus to perform writing control according to monitored data amount of received data, associated memory apparatus thereof and associated controller thereof
Publication Date: 2016.12.06 SILICON MOTION INC
  • US9514042B2 patent drawing
  • US9514042B2 patent drawing
  • US9514042B2 patent drawing

AI summary

A method for managing a memory apparatus and the associated memory apparatus thereof and the associated controller thereof are provided, where the method includes: temporarily storing data received from a host device into a volatile memory in the controller and utilizing the data in the volatile memory as received data, and dynamically monitoring the data amount of the received data to determine whether to immediately write the received data into at least one non-volatile memory element; and when determining to immediately write the received data into the at least one non-volatile memory element, directly writing the received data into a specific block configured to be a Multiple Level Cell memory block within a specific non-volatile memory element, rather than indirectly writing the received data into the specific block by first temporarily writing the received data into any other block configured to be Single Level Cell memory block.