MLC-Fine QLC Memory Two-Stage Programming Buffer Reduction
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Solution Overview
Problem
Existing methods for programming multi-level NAND flash memory cells require additional hardware resources, increasing complexity and cost while reducing available space, due to stringent precision demands as bit capacity increases.
Innovation Solution
A two-stage programming sequence, known as MLC-Fine programming, which reduces write buffer requirements by allowing data to be read from system-level memory or volatile memory during the fine programming stage, enabling implicit disablement of data load operations and dual user control for internal sensing or system-supplied data, thereby reducing the need for all four pages of data initially.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional programming methods are used for multi-level NAND flash memory cells, then programming precision can be maintained, but additional hardware resources are required, increasing device complexity and cost
Solution Approach 1:
The programming process is divided into two distinct stages: a first programming stage that programs initial data, and a second programming stage that programs additional data to achieve finer precision. This segmentation allows the system to achieve high programming precision without requiring complex hardware resources throughout the entire programming process, as each stage uses simpler operations appropriate to its specific goal.
2Measurement precision
If traditional programming methods are used for multi-level NAND flash memory cells, then programming precision can be maintained, but hardware resources increase cost
Solution Approach 1:
By segmenting the programming process into two stages with different resource requirements, the system achieves high precision programming without requiring expensive hardware resources for the entire process. The first stage uses basic programming operations, while the second stage adds precision enhancement, allowing cost-effective manufacturing while maintaining high programming precision.
3Reliability
If all four pages of data are required initially for programming, then complete data availability is ensured, but write buffer requirements increase
Solution Approach 1:
The first programming stage programs initial data (first page) in advance, establishing a foundation that enables the second programming stage to operate with reduced buffer requirements. This preliminary action ensures that critical data is already in place before additional data pages are loaded, allowing the system to maintain reliability while reducing the quantity of data that must be held in buffers simultaneously.
Solution Approach 2:
The system dynamically adjusts data loading requirements based on the programming stage. During the first programming stage, minimal data is required in buffers. During the second programming stage, additional data pages are loaded as needed. This dynamic approach ensures data availability when required while minimizing write buffer requirements at any given moment.
Data Source
AI summary
Aspects of a storage device including a memory and a controller are provided. The memory includes non-volatile memory and volatile memory. The controller may determine whether first data is available at a system-level memory location during a first programming stage of a two-stage programming sequence. The controller may read the first data from the system-level memory location when the page data is available at the system-level memory location. Alternatively, the controller may read the first data from the non-volatile memory when the page data is not available at the system-level memory location. Thus, the controller may perform a first programming operation associated with the first programming stage using the first data, thereby improving memory programming performance of the storage device.