MLC Flash Cache Eviction Policy for Decoding Performance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing non-volatile memory systems face challenges in efficiently managing cache memory, particularly in Multi-Level Cell (MLC) Flash memory, where higher bit significance pages are often evicted before lower bit significance pages, leading to suboptimal decoding performance and increased read operations.
Innovation Solution
Implementing a cache management system that prioritizes the eviction of higher bit significance pages over lower bit significance pages, allowing for improved decoding performance by retaining LSB pages in the cache, which assists in decoding MSB pages without additional read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If higher bit significance pages are evicted before lower bit significance pages from cache memory, then cache memory is cleared efficiently, but decoding performance deteriorates and additional read operations are required
Solution Approach 1:
The patent inverts the conventional eviction policy by evicting lower bit significance pages (LSB) before higher bit significance pages (MSB). This reversal allows MSB pages to be retained in cache memory longer, enabling more frequent opportunistic decodings where MSB pages can be decoded using cached LSB pages as reference data, thereby improving decoding performance while maintaining cache efficiency.
2Reliability
If LSB pages are retained in cache memory, then MSB pages can be decoded with improved performance, but cache memory usage increases
Solution Approach 1:
The patent applies preliminary action by pre-caching LSB pages in the cache memory before they are needed for MSB decoding. This allows the system to have reference data readily available when MSB pages need to be decoded, enabling faster and more reliable decoding operations without requiring additional read operations from non-volatile memory, thus managing cache usage proactively rather than reactively.
3Measurement precision
If additional read operations are performed to retrieve LSB pages for MSB decoding, then decoding accuracy improves, but latency and power consumption increase
Solution Approach 1:
The patent pre-loads LSB pages into the cache memory before they are needed for MSB decoding operations. This preliminary action ensures that when MSB pages require decoding assistance from LSB pages, the reference data is already available in the fast cache memory, eliminating the need for additional read operations from slower non-volatile memory, thereby reducing latency and power consumption while maintaining decoding accuracy.
Data Source
AI summary
A method includes reading memory pages from a non-volatile memory that holds at least first memory pages having a first bit significance and second memory pages having a second bit significance, different from the first bit significance. At least some of the read memory pages are cached in a cache memory. One or more of the cached memory pages are selected for eviction from the cache memory, in accordance with a selection criterion that gives eviction preference to the memory pages of the second bit significance over the memory pages of the first bit significance. The selected memory pages are evicted from the cache memory.