MLC Flash Cross-Decoding for ECC Redundancy Allocation

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Solution Overview

Problem

Non-volatile storage systems, particularly NAND flash memory, face challenges in maintaining performance and efficiency due to increasing uncertainties in data storage and retrieval as manufacturing scales down, leading to higher probabilities of data corruption and errors, especially in multi-level-cell (MLC) technology.

Innovation Solution

The implementation of cross-decoding techniques, where an SSD controller adjusts the allocation of redundancy and data space across pages to equalize bit error rates and reduce decoding time, using iterative and non-iterative methods to assist in correcting uncorrectable errors by leveraging decoding results from associated pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If manufacturing scale is downsized to increase storage capacity, then storage density is improved, but data corruption probability increases

Engineering Contradiction:
Improvestorage capacityVSAvoiddata corruption probability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the decoding process into multiple independent decoding attempts with different assumptions about error locations. Instead of treating all bits uniformly, the system divides the decoding task into separate trials where each trial assumes different bit patterns for ambiguous positions, thereby handling high error rates without sacrificing storage density

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary decoding attempts before final data retrieval. Multiple decoding trials are executed in advance with different error location assumptions, and the results are prepared and validated before committing to a final decoded value. This preliminary action allows the system to handle corruption proactively rather than reactively

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If traditional ECC decoding is used on pages with high error rates, then decoding simplicity is maintained, but decoding success rate decreases

Engineering Contradiction:
Improvedecoding complexityVSAvoiddecoding success rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a dynamic decoding approach where the system adapts its decoding strategy based on the observed error patterns. The decoder transitions from a simple single-attempt approach to a multi-attempt approach with different assumptions, dynamically selecting the path that leads to successful decoding while maintaining reasonable complexity through structured trial-and-error

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses feedback from intermediate decoding results to guide subsequent decoding attempts. When the first decoding attempt fails, the system analyzes the error patterns and uses this feedback to adjust assumptions for the next decoding trial, thereby improving success rates without requiring excessively complex decoding logic

Inventive Principle:
Principle #23Feedback

3Reliability

If cross-decoding between associated pages is implemented, then bit error rate performance is improved, but access time increases

Engineering Contradiction:
Improvebit error rate performanceVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial cross-decoding where only the necessary portions of associated pages are decoded to assist with the primary decoding task. Instead of fully decoding all associated pages, the system performs selective decoding of only those portions needed to resolve errors in the target page, thereby reducing the time penalty while maintaining BERT performance improvements

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8719663B2Cross-decoding for non-volatile storage
Publication Date: 2014.05.06 SEAGATE TECH LLC
  • US8719663B2 patent drawing
  • US8719663B2 patent drawing
  • US8719663B2 patent drawing

AI summary

Cross-decoding assists decoding of an otherwise uncorrectable error when decoding a desired page of a multi-level-cell technology flash memory. A solid-state disk (SSD) controller adjusts space allocated to redundancy respectively within various pages (e.g. upper, middle, and lower pages) such that the respective pages have respective effective Bit Error Rates (BER)s, optionally including cross-decoding, that approach one another. Alternatively the controller adjusts the allocation to equalize decoding time (or alternatively access time), optionally including decoding time (accessing time) accrued as a result of cross-decoding when there is an otherwise uncorrectable error. The adjusting is via (a) respective ratios between allocation for ECC redundancy and user data space, and/or (b) respective coding rates and/or coding techniques for each of the various pages. Alternatively the controller adjusts the allocation to maximize total usable capacity by allocating to redundancy and data for the various pages, assuming that cross-decoding is to be used.