Dynamic Memory Parameter Adjustment for MLC Flash Endurance
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Solution Overview
Problem
Multi-level cell (MLC) flash memory devices face reliability and endurance issues due to increased program/erase cycle stresses, leading to degradation in performance, making them unsuitable for enterprise applications despite offering increased data capacity.
Innovation Solution
A method and system for dynamically adjusting memory parameters such as read levels and program verify levels in flash memory devices based on circuit characteristics like P/E cycles and retention time, using a controller to monitor these conditions and apply appropriate adjustments to extend the number of P/E cycles and reduce bit error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell (MLC) flash memory is used to increase data capacity, then storage capacity is improved, but reliability and endurance deteriorate due to increased program/erase cycle stresses
Solution Approach 1:
The patent applies dynamics by dynamically adjusting read levels and program verify levels based on the number of P/E cycles experienced by memory blocks. The controller continuously monitors P/E cycle counts and modifies operating parameters in real-time, transforming static memory operation into a dynamic adaptation process that responds to wear accumulation, thereby extending endurance while maintaining MLC capacity
Solution Approach 2:
The patent implements parameter changes by modifying read levels and program verify levels as specific parameters based on monitored P/E cycle characteristics. By changing these electrical parameters in response to wear conditions, the system optimizes memory cell operation under different stress levels, resolving the contradiction between maintaining high capacity and ensuring reliability under repeated cycling
2Quantity of substance
If multi-level cell (MLC) flash memory is used to increase data capacity, then storage capacity is improved, but program/erase cycle endurance deteriorates due to increased wear causing stresses
Solution Approach 1:
The system dynamically adapts operating parameters based on accumulated P/E cycle experience, transforming the static endurance limitation into a manageable characteristic through continuous parameter adjustment. This dynamic approach extends the effective duration of P/E cycles by optimizing operation conditions as wear progresses
Solution Approach 2:
The patent applies preliminary action by proactively adjusting read and program verify levels before critical failure occurs. By monitoring P/E cycle counts and preemptively modifying parameters in response to wear trends, the system prevents catastrophic failures and extends the operational lifespan of MLC memory blocks
3Device complexity
If fixed memory parameters are used throughout the device lifetime, then device complexity is reduced, but performance degradation occurs due to unadjusted operating conditions under varying P/E cycles
Solution Approach 1:
The patent implements self-service by enabling the memory system to automatically monitor its own P/E cycle conditions and autonomously adjust its operating parameters without external intervention. The controller performs self-diagnostics and self-optimization, reducing the need for complex external control mechanisms while maintaining performance consistency
Solution Approach 2:
The system employs feedback by continuously monitoring P/E cycle counts and using this information to adjust read and program verify levels. This closed-loop control mechanism ensures performance consistency by responding to actual wear conditions, resolving the contradiction between simplicity and reliability through intelligent feedback-based adaptation
Data Source
AI summary
Disclosed is an apparatus and method for adjusting a memory parameter in a non-volatile memory circuit. On a trigger event, a parameter is determined in accordance with a circuit characteristic associated with the memory block. The parameter may be a new read level voltage to apply to a page of a memory block, or a program verify level voltage used to program a page of a memory block. On determining the parameter a command is sent to the memory circuit to apply the parameter to the page of the memory block. The method can be triggered by an event such as P/E cycle times and the condition is dynamically adjusted to extend the life of the memory circuit.